CH IEEE Seminar : Delta Sigma ADCs : Theory, Circuit design challenges and ways to address them

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Dear Members,

We have the pleasure welcoming  Dr. Amrith Sukumaran who is a Senior circuit designer with the CSEM, Zürich.

He will provide us with a tutorial on : "Delta Sigma ADCs : Theory, Circuit design challenges and ways to address them"

The event is taking place on 8th of December as follow

1. 15:30 - 16:30 : Lecture at ETH Zurich ETZ Building Room ETZ J64.1

Or Join via Zoom https://ethz.zoom.us/j/63696197064

2. 16:30 - 17:00 : Q&A

We are looking forward to meeting you there,

Prof. Taekwang Jang

For IEEE Solid State Circuit Society Switzerland Chapter committee


  Date and Time

  Location

  Hosts

  Registration


  • Date: 08 Dec 2022
  • Time: 02:30 PM UTC to 04:00 PM UTC
  • Add_To_Calendar_icon Add Event to Calendar
  • ETH Zürich
  • Gloriastrasse 35
  • Zürich, Switzerland
  • Switzerland 8092
  • Building: ETZ
  • Room Number: J64.1
  • Contact Event Host
  • Starts 22 November 2022 10:43 PM UTC
  • Ends 07 December 2022 11:00 PM UTC
  • No Admission Charge

  Speakers

Dr. Amrith Sukumaran of CSEM

Topic:

Delta Sigma ADCs : Theory, Circuit design challenges and ways to address them

With the evolution and emergence of new sensory applications, the complexity of data
and signal processing is increasing exponentially. Today, more and more of these processing is done

in the digital domain largely due to the availability of scalable, power and area efficient modern sub-
nm transistor fabrication processes. Therefore, there is a necessity for analog to digital conversion

that preserves the fidelity of the sensory signals while achieving a high throughput. For applications
demanding very high resolution/fidelity, Delta Sigma ADCs are the architectures of choice and are
ubiquitous in this segment. This talk aims to first touch upon certain key basic concepts of Delta
Sigma Modulation and the building blocks that go into building such an ADC. Then, the practical
challenges that are encountered in the design of high-resolution Delta Sigma ADCs are showcased,
followed by discussion on the various state of the art system and circuit-design techniques that can
be used to address them.

Biography:

Dr. Amrith Sukumaran received his Bachelor degree in 2008 from Madras Institute of
Technology, India and his MS in 2011 from the Indian Institute of Technology Madras(IIT-M), India.
He worked on the research and development of CMOS Audio codec Integrated circuits during his
Masters. He received his PhD in 2016 also from IIT-M where his area of research focus was on
developing very high-performance Delta-Sigma converters. He was the recipient of the IEEE Solid
State Circuits Society pre-doctoral achievement award in 2016. Consequently, he joined Texas
Instruments where he worked in the High-speed data converters group and later joined Steradian
semiconductors, a Renesas company where he led the development on Data converters for
automotive radar applications. Since 2020, he is with CSEM, Zürich as a senior circuit designer
focusing on developing innovative solutions for audio and biomedical electronic devices.

Email:

Address:CSEM, Technoparkstrasse 1, Zurich, Switzerland