IEEE EPS Distinguished Lecture: Chiplet Design and Heterogeneous Integration Packaging
Please note that this lecture has unfortunately had to be cancelled. Lecture notes from the talk will be shared with registrants. We sincerely apologize for the inconvenience.
The IEEE Toronto Electronics Packaging Society is proud to present Distinguished Lecturer Dr. John Lau of Unimicron Technology Corporation and his talk on "Chiplet Design and Heterogeneous Integration Packaging".
Abstract
Chiplet is a chip design method and heterogeneous integration is a chip packaging method. Heterogeneous integration uses packaging technology to integrate dissimilar chips, photonic devices, and/or components (either side-by-side, stacked, or both) with different sizes and functions, and from different fabless design houses, foundries, wafer sizes, feature sizes and companies into a system or subsystem on a common package substrate. For the next few years, we will see more implementations of a higher level of chiplet designs and heterogeneous integration packaging, whether it is for time-to-market, performance, form factor, power consumption or cost. In this lecture, the introduction, recent advances, and trends in chiplet design and heterogeneous integrationpackaging will be presented.
Please join us Tuesday, December 13th at 11 AM in BA1240. The event will also be streamed live on Zoom for those who cannot attend in person.
Food and refreshments will be served.
Date and Time
Location
Hosts
Registration
- Date: 13 Dec 2022
- Time: 11:00 AM to 12:30 PM
- All times are (UTC-05:00) Eastern Time (US & Canada)
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- 40 St George St
- Room BA1240
- Toronto, Ontario
- Canada M5S 2E4
- Building: Bahen Centre for Information Technology
- Starts 01 December 2022 05:22 PM
- Ends 12 December 2022 11:00 AM
- All times are (UTC-05:00) Eastern Time (US & Canada)
- No Admission Charge
Speakers
Dr. John H Lau of Unimicron Technology Corporation
Chiplet Design and Heterogeneous Integration Packaging
Biography:
John H Lau, with more than 40 years of R&D and manufacturing experience in semiconductor packaging, has published more than 515 peer-reviewed papers (out of which 370 are the principal investigator), 40 issued and pending US patents (out of which 25 are the principal inventor), and 23 textbooks (all are the first author). John is an elected IEEE fellow, IMAPS Fellow, and ASME Fellow, and has been actively participating in industry/academy/society meetings/conferences to contribute, learn, and share...