Future Chips Roadmaps: CPUs, GPUs, FPGAs and Beyond

#kalwani #sharan #75 #year #computer #society #michigan #r10 #r4 #Future #Chips #roadmaps: #CPUs #GPUs #FPGAs #and #Beyond
Share

Future Chips Roadmaps: CPUs, GPUs, FPGAs and Beyond


As servers that were designed using x86-based architectures started becoming the norm in the early 2000s, there was a huge sea-change toward using these commodity-based systems. Supercomputers started being constructed using these systems instead of proprietary systems like POWER and SPARC for example. Those early designs, along with the emergence of the "free" Linux OS, the ground was laid for the internet boom to occur. What also emerged was standards.  Standards in peripherials (i.e. PCIe, SATA, etc) and reference designs from Intel, NVIDIA and AMD were established and competition to maintain Moore's Law became fierce.

Now that we have seen Exascale capable system installed at Oak Ridge National Labs using these "commodity" designs, what is next for the mass computing market? This session will focus on how the technology that supercomputers and cloud use today will drive the next challenges for OEMs (Lenovo, Dell, HP, etc) and also in the datacenters. Mechanical, thermal and electrical issues are being exacerbated by the intense focus to increase performance in every component of a system from CPUs to GPUs to Networking and beyond and you'll hear the strategy of how we will harness emerging technology for next-generation systems.



  Date and Time

  Location

  Hosts

  Registration



  • Date: 27 Apr 2023
  • Time: 04:30 PM to 05:30 PM
  • All times are (GMT-05:00) US/Eastern
  • Add_To_Calendar_icon Add Event to Calendar
If you are not a robot, please complete the ReCAPTCHA to display virtual attendance info.
  • Contact Event Hosts
  • Starts 21 March 2023 10:24 AM
  • Ends 27 April 2023 10:00 AM
  • All times are (GMT-05:00) US/Eastern
  • No Admission Charge


  Speakers

Matthew T. Ziegler Matthew T. Ziegler of Lenovo

Topic:

Future Chips Roadmaps

As servers that were designed using x86-based architectures started becoming the norm in the early 2000s, there was a huge sea-change toward using these commodity-based systems. Supercomputers started being constructed using these systems instead of proprietary systems like POWER and SPARC for example. Those early designs, along with the emergence of the "free" Linux OS, the ground was laid for the internet boom to occur. What also emerged was standards.  Standards in peripherials (i.e. PCIe, SATA, etc) and reference designs from Intel, NVIDIA and AMD were established and competition to maintain Moore's Law became fierce.

Now that we have seen Exascale capable system installed at Oak Ridge National Labs using these "commodity" designs, what is next for the mass computing market? This session will focus on how the technology that supercomputers and cloud use today will drive the next challenges for OEMs (Lenovo, Dell, HP, etc) and also in the datacenters. Mechanical, thermal and electrical issues are being exacerbated by the intense focus to increase performance in every component of a system from CPUs to GPUs to Networking and beyond and you'll hear the strategy of how we will harness emerging technology for next-generation systems.

 

Biography:

As Director of HPC Architecture and Performance, Matthew is responsible for defining Lenovo’s systems and solutions strategy HPC and AI Deep Learning. Matthew received his Bachelor of Arts in Molecular, Cellular and Developmental Biology from the University of Colorado, Boulder and went on to work in and publish leading research in plant genetics. Matthew joined IBM in 2001 where he worked as a HPC architect on North America’s Advanced Technical Support team. There he broadened his scope of HPC designs into other area such as Oil and Gas, Digital Media, Weather/Atmospheric Sciences and General Research. As the market for x86 based clusters continued to expand, Matthew progressed to the role of Executive Architect in the System x-Product Marketing team at IBM before transitioning to Lenovo in 2014.

Address:Cyber City

Sharan Kalwani Sharan Kalwani of IEEE Southeastern Michigan Section

Biography:

Sharan Kalwani is an industry technology specialist with 25+ years of experience. Sharan has degrees in both Engineering and Computer Science. He has worked in many diverse areas. He is a sought after speaker at many a diverse conference and seminars, such as Supercomputing, HPC Advisory Council, SIAM, Infiniband Trade Association, etc. He has delivered several tutorials, workshops and chaired Birds-of-a-Feather (BoF) sessions. Sharan is a senior member of IEEE, an Emeritus member of Michigan!UNIX/user group (mug.org) the oldest of the *nix user groups based in Michigan (they were first established in late 1985), member of Association for Computing Machinery (ACM) and also leads the SIG-Linux section of SEMCO. He enjoys teaching, holds an Adjunct Faculty position at local educational sites. He has published one book "Linux and Internet Security" and is now working on his second about a new computer programming language. He is a recipient of the 2018 IEEE MGA Achievement award, 2021 IEEE Region 4 Jack Sherman award and 2022 Robert Neff Section award for his contributions to IEEE activities.

He has been the Chair of the IEEE Southeastern Michigan Section since October 2021 and various officer roles for many of the Southeastern Michigan Geo Units over the years. He also serves as one of the writers/editors of the Sections monthly newsletter - Wavelengths. He has also served as Vice-Chair of IEEE Sustech 2022, IEEE SusTech 2021 Global Conferences.






Agenda

04:30 PM (EST/EDT) - Start of event, introductions, Geo Unit update
04:40 PM (EST/EDT) - Formal start of presentation
05:20 PM (EST/EDT) - Approximate end of presentation, start of Q&A + discussions
05:30 PM (EST/EDT) - Wrap up and formal end of event



An IEEE Southeastern Michigan Section quintessential presentation - open to all. Consider becoming an IEEE member if such similar events are of professional/academic interest to you/



  Media

Future Chips Roadmaps Future Chips Roadmaps: CPUs, GPUs, FPGAs and Beyond - flyer 339.38 KiB