Hybrid Bonding: Greater Functionality, Higher Performance and Smaller Size

#fine #pitch #interconnect #density #face-to-face #connection #signal #integrity
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Massive demands are being placed on computing due to skyrocketing increases in data consumption. Penetration of AI and ML into more and more fields requires real-time fast processing at the edge as well as fast data transfer to datacenters for analysis. 5G and 6G technologies demand ever increasing frequency for wireless communications. Autonomous driving and other harsh environments demand high reliability. The semiconductor industry needs to continuously deliver better performance from a smaller footprint with higher frequency response, higher reliability, lower power consumption, and all with a lower barrier for entry than advances at the transistor level. How are these rigorous market demands influencing innovations in chip manufacturing and advanced interconnect such as hybrid bonding?
This presentation will give a brief introduction of the hybrid bonding technology, how it enables disaggregation and heterogeneous integration and helps increase efficiency and performance while shrinking footprint, and how it enables high reliability.


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  • Date: 15 Jun 2023
  • Time: 12:00 PM to 01:00 PM
  • All times are (UTC-07:00) Pacific Time (US & Canada)
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  • SEMI World Hdqtrs
  • 673 S Milpitas Blvd
  • Milpitas, California
  • United States 95035
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  Speakers

Guilian Gao Guilian Gao of Adeia

Topic:

Hybrid Bonding: Greater Functionality, Higher Performance and Smaller Size

on. Penetration of AI and ML into more and more fields requires real-time fast processing at the edge as well as fast data transfer to datacenters for analysis. 5G and 6G technologies demand ever increasing frequency for wireless communications. Autonomous driving and other harsh environments demand high reliability. The semiconductor industry needs to continuously deliver better performance from a smaller footprint with higher frequency response, higher reliability, lower power consumption, and all with a lower barrier for entry than advances at the transistor level. How are these rigorous market demands influencing innovations in chip manufacturing and advanced interconnect such as hybrid bonding?
This presentation will give a brief introduction of the hybrid bonding technology, how it enables disaggregation and heterogeneous integration and helps increase efficiency and performance while shrinking footprint, and how it enables high reliability.

Biography:

Guilian Gao received her Ph.D. in Materials Science from the University of Cambridge, UK, her M.S. in Corrosion and Protection from University of Manchester, UK and her B.S. in Materials Science and Engineering from Beihang University, China. Dr. Gao has 34 years of experience in electronics packaging technology development, materials, processes, and reliability engineering. She is currently a Distinguished Engineer in 3D Technology at Adeia in San Jose. Prior to her current assignment, she was a Staff Engineer and Program Manager at Tessera Inc. Before joining Tessera, she was a Senior Technical Specialist at Ford Motor Co. and was awarded the Henry Ford Technology Award — the highest award for technical achievement in Ford Motor Company. Dr. Gao holds 70 US patents and has more than 40 publications.