David Wentzloff

Cell-based, synthesizable mixed-signal circuits such as ADPLLs, ADCs, and LDOs are gaining significant traction. This is fueled by the exponentially increasing number of DRC rules in advanced nodes, added restrictions on custom layout, and overall increase in design time for full-custom, analog designs. This talk focuses on a different technique for analog design automation that borrows from the digital design flow. I will show how we can describe ADPLLs and LDOs using a combination of standard cells, and a small number of auxiliary cells. These aux cells are no larger than a D-flipflop, and are drawn on the standard cell grid. This means they can be included in existing digital synthesis and automatic place & route (APR) flows, leveraging these very powerful commercial tools. I will present our innovations at the architecture level, and on how we drive the EDA tools, in order to improve performance. Examples and measurement results will be shown, from fabricated ADPLLs and LDOs in TSMC 65nm and GF 12nm, demonstrating the ease of porting these designs across processes.

Biography:

David Wentzloff received a BS in Electrical Engineering from the University of Michigan, and Ph.D. in EE from MIT. Since, 2007 he has been with the University of Michigan, where he is currently an Associate Professor of Electrical Engineering and Computer Science. His research focuses on RF integrated circuits, with an emphasis on ultra-low power design. In 2012, he co-founded Everactive, a fabless semiconductor company developing ultra-low power wireless SoCs, where he is currently the co-CTO.