Dr. Yiran Chen

The advancement of Artificial Intelligence (AI) and its rapid deployment on a broad spectrum of platforms relies on both design quality and design efficiency of circuits, systems, and algorithms. Moreover, security and robustness concerns arise at both hardware and software levels in some critical applications of AI models. Cross-layer optimization becomes essential to achieve these goals. In this talk, we first introduce circuit-level innovations for emerging AI models and devices, including the popular processing-in-memory (PIM) computing primitives centered on various new types of nanodevices. After that, we discuss efficient architecture design atop these innovations, such as multiplier array, systolic array, PIM-based deep neural network (DNN), and spiking neural network (SNN) pipelines. Then we present hardware-friendly model compression techniques to optimize the quality-efficiency trade-off on AI models. We also introduce several efficient distributed learning frameworks that enable the scalability of AI systems. Finally, we show some approaches to resolve the challenges introduced by the imperfect characteristics of semiconductor devices and the security concerns in real-world systems. We hope our talk will offer the audience a comprehensive overview of a full-stack design and optimization of efficient AI circuits and systems (AI-CAS) solutions.

Biography:

Yiran Chen received B.S (1998) and M.S. (2001) from Tsinghua University and Ph.D. (2005) from Purdue University. After five years in the industry, he joined the University of Pittsburgh in 2010 as Assistant Professor and was promoted to Associate Professor with tenure in 2014, holding Bicentennial Alumni Faculty Fellow. He is now the Professor of the Department of Electrical and Computer Engineering at Duke University and serving as the director of the NSF AI Institute for Edge Computing Leveraging the Next-generation Networks (Athena), the NSF Industry-University Cooperative Research Center (IUCRC) for Alternative Sustainable and Intelligent Computing (ASIC), and the co-director of Duke Center for Computational Evolutionary Intelligence (DCEI). His group focuses on the research of new memory and storage systems, machine learning and neuromorphic computing, and mobile computing systems. Dr. Chen has published 1 book and about 500 technical publications and has been granted 96 US patents. He has served as the associate editor of more than a dozen international academic periodicals and served on the technical and organization committees of more than 60 international conferences. He is now serving as the Editor-in-Chief of the IEEE Circuits and Systems Magazine. He received 9 best paper awards, 1 best poster award, and 15 best paper nominations from reputable international conferences and workshops. He received numerous awards for his technical contributions and professional services such as the IEEE Computer Society Edward J. McCluskey Technical Achievement Award, etc. He has been the distinguished lecturer of IEEE CEDA and CAS. He is a Fellow of the ACM, IEEE, and AAAS, and now serves as the chair of ACM SIGDA.

Address:United States