Advancements in Package High-Speed Signalling and Standardization
Technical Seminat by Dr. Kemal Aygün (Intel Fellow, IEEE Fellow) with the following abstract:
Recently, applications such as artificial intelligence has been evolving very rapidly and bringing with it a more stringent set of requirements for system performance. One area where the performance demand has been scaling very aggressively is that for interconnecting different components in an electronic system using high speed signaling. To address this demand, the pace of innovation in electronic packaging has also increased greatly in recent years, bringing with it a new set of challenges for electrical design, analysis, and validation. This presentation will review some of the recent developments in electronic packaging technologies and corresponding electrical analysis and validation methodologies and metrologies to address some of these challenges. It will also summarize some of the recent advancements on standardization of on-package high speed signaling interconnects with a focus on Universal Chiplet Interconnect Express (UCIe).
Date and Time
Location
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Registration
- Date: 06 Sep 2023
- Time: 10:00 AM to 11:00 AM
- All times are (UTC-07:00) Pacific Time (US & Canada)
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- Vancouver, British Columbia
- Canada
- Starts 31 August 2023 12:00 AM
- Ends 06 September 2023 10:00 AM
- All times are (UTC-07:00) Pacific Time (US & Canada)
- No Admission Charge
Speakers
Kemal Aygün of Intel
Advancements in Package High-Speed Signalling and Standardization
Abstract: Recently, applications such as artificial intelligence has been evolving very rapidly and bringing with it a more stringent set of requirements for system performance. One area where the performance demand has been scaling very aggressively is that for interconnecting different components in an electronic system using high speed signaling. To address this demand, the pace of innovation in electronic packaging has also increased greatly in recent years, bringing with it a new set of challenges for electrical design, analysis, and validation. This presentation will review some of the recent developments in electronic packaging technologies and corresponding electrical analysis and validation methodologies and metrologies to address some of these challenges. It will also summarize some of the recent advancements on standardization of on-package high speed signaling interconnects with a focus on Universal Chiplet Interconnect Express (UCIe).
Biography:
Kemal Aygün received the Ph.D. degree in electrical and computer engineering from the University of Illinois at Urbana-Champaign, Urbana, IL, USA. He is currently an Intel Fellow and manages the High-Speed I/O (HSIO) team in the Electrical Core Competency group at Intel Corporation, Chandler, AZ, USA. His research interests include novel technologies along with electrical modeling and characterization techniques for microelectronic packaging. He has co-authored five book chapters, more than 90 journal and conference publications, and holds 87 U.S. patents. Dr. Aygün is an IEEE Fellow and has been acting as a Distinguished Lecturer for the IEEE Electronics Packaging Society (EPS); a co-chair of the EPS Technical Committee on Electrical Design, Modeling, and Simulation; and an associate editor for the IEEE Transactions on Components Packaging, and Manufacturing Technology.