ISSCC 2023 Tutorial: The Art of mm-Wave Design and Layout

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We live in the golden age of mm-wave ASIC design! With the rise of 5G networks & 6G research, a massive push for commercialization of mm-wave integrated circuits is underway. This tutorial explores the hidden impairments that are often overlooked or difficult to locate in mm-wave layouts and interconnects. Using real-life fabricated circuit blocks operating up to and beyond D-band (170GHz), as well as optical circuits operating beyond 100Gb/s, the tutorial will explore layout challenges and impairments that can adversely affect the circuit performance. After modeling these elements, simulations demonstrate the impact of the parasitics on bandwidth, center frequency, stability, and noise figure. Using simple and quick modeling techniques, the designers can incorporate effects of various layout parasitics. Furthermore, mm-wave techniques at the chip level are explored from ground planes to flip-chip bumps. Finally, going beyond the boundaries of integrated circuits, co-design techniques will be explored to carry mm-wave signals into packages, printed circuit boards, and antennas.



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  • University of Calgary
  • Calgary, Alberta
  • Canada
  • Building: ICT
  • Room Number: 424C

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  • Starts 02 October 2023 03:10 PM UTC
  • Ends 10 October 2023 02:59 PM UTC
  • No Admission Charge


  Speakers

Shahriar Shahramian of Nokia-Bell Labs

Topic:

The Art of mm-Wave Design and Layout

We live in the golden age of mm-wave ASIC design! With the rise of 5G networks & 6G research, a massive push for commercialization of mm-wave integrated circuits is underway. This tutorial explores the hidden impairments that are often overlooked or difficult to locate in mm-wave layouts and interconnects. Using real-life fabricated circuit blocks operating up to and beyond D-band (170GHz), as well as optical circuits operating beyond 100Gb/s, the tutorial will explore layout challenges and impairments that can adversely affect the circuit performance. After modeling these elements, simulations demonstrate the impact of the parasitics on bandwidth, center frequency, stability, and noise figure. Using simple and quick modeling techniques, the designers can incorporate effects of various layout parasitics. Furthermore, mm-wave techniques at the chip level are explored from ground planes to flip-chip bumps. Finally, going beyond the boundaries of integrated circuits, co-design techniques will be explored to carry mm-wave signals into packages, printed circuit boards, and antennas.

Biography:

Shahriar Shahramian received the Ph.D. degree from University of Toronto in 2010 where he focused on the design of mm-wave data converters and transceivers. Dr. Shahramian has been with Bell Laboratories – Nokia since 2009 and is currently the Director of the Communication & Sensing ASICs Research Group. His research focus includes the design of mm-wave wireless and wireline integrated circuits and systems. Dr. Shahramian is a Bell Labs Fellow and leads the design and architecture of several state-of-the-art ASICs for optical coherent and wireless backhaul products. Shahriar serves as the chair of the mm-Wave & THz subcommittee of IEEE BCICTS, as well as chair of mm-Wave SoCs at IEEE RFIC, and is a member of the technical program committee of IEEE ISSCC. He has also served as the Guest Editor of the IEEE Journal of Solid-State Circuits (JSSC). Dr. Shahramian has been the recipient of an Ontario Graduate Scholarship and a University of Toronto Fellowship. He also received the best paper awards at the CSICS Symposium in 2005 and 2015, the RFIC Symposium in 2015 and 2020 and ISSCC in 2018. He was the recipient of the IEEE MTT Young Engineer Award in 2020. He holds an Adjunct Associate Professor position at Columbia University, has received several teaching awards and is the founder and host of The Signal Path educational video series. Dr. Shahramian has presented short courses and workshops at the IEEE CSICS, BCTM, BCICTS, RFIC/IMS and ISSCC conferences.