Aritra Banerjee

Modern integrated circuit technology has enabled a lot of applications in the RF, mm-wave, and sub-
THz frequency range at a low cost and in a small form factor in emerging areas such as wireless

communication and radar-based sensing. In this presentation, key challenges in RF, mm-wave, and

sub-THz circuit design for next generation high data rate wireless communication systems and high-
resolution radars will be discussed. To address the demand for high performance in these systems, it

is becoming increasingly important to take a multidisciplinary approach such as digitally assisted RF
circuits and heterogeneous co-integration of III-V and CMOS technologies. The power amplifier (PA)
is one of the most critical blocks in the transceiver and innovative PA architectures, which utilize such
multidisciplinary techniques to improve output power, efficiency, gain, and linearity, will be discussed
in this presentation. Novel topologies of digitally enhanced outphasing and pulse width modulated
(PWM) PAs in 45nm CMOS at 2.4GHz will be presented. An innovative 74GHz stacked segmented
adaptive PA architecture in 22nm FD-SOI technology will be shown next. Then an InP based 130GHz
PA will be presented that can take advantage of III-V and CMOS co-integration for 6G wireless
communication. Finally, future directions and research opportunities will be discussed.

Biography:

Aritra Banerjee received the B.E. degree in Electronics and Telecommunication
Engineering from Jadavpur University, Kolkata, India, in 2009, and the M.S. and
Ph.D. degrees in Electrical and Computer Engineering from Georgia Institute of
Technology, Atlanta, GA, USA, in 2011 and 2013, respectively. He is a tenure-track
assistant professor in the Department of Electrical and Computer Engineering at
University of Illinois Chicago. His research interests include analog, RF, mm-wave,
and THz integrated circuits and systems for applications such as next generation wireless
communication and radar based sensing. From 2013 to 2017, he was an Analog Design Engineer with
Texas Instruments, Dallas, TX, USA, where he worked in the Kilby Labs research center and the
Wireless Infrastructure group, focusing on the design of switch-mode CMOS RF power amplifiers,
high performance VCOs, and integrated RF transceivers. From 2017 to 2022 he was with imec,
Kissimmee, FL, USA, focusing on RF and mm-wave IC design for radar and high data rate wireless
communication transceivers. From 2022, he has been working as the founder and CEO of his startup
company. He has authored or coauthored over 50 papers in refereed international journals and
conferences and has 5 granted US patents. Dr. Banerjee is a member of the Technical Program
Committee (TPC) of the IEEE Custom Integrated Circuits Conference (CICC) and in CICC 2023 he served
as the co-chair of the wireless sub-committee and in CICC 2024 he is serving as the chair of the
wireless sub-committee. He was a recipient of the IEEE Circuits and Systems Society Student Travel
Award in 2013, and the IEEE Microwave Theory and Techniques Society Graduate Fellowship in 2012.