Machine learning applications in hardware design: SIPI perspective

#AI, #machine #learning #SIPI, #optimization, #decap #electromagnetic #integrity #emc
Share

 

5:30pm: food and drink

6:15pm: presentation

In recent years, there has been a surge in the use of machine learning techniques across diverse domains, including hardware design. With the growing complexity of modern hardware systems, there arises a compelling demand for the development of more efficient and effective design methodologies. Machine learning can play a pivotal role and offer capabilities that were not possible in conventional ways. In this talk, recent progress in machine learning applications in hardware design, with a specific focus on SI/PI, will be introduced. The case studies include: 1) PDN impedance prediction, 2) pre/post-layout decap optimization, and 3) stack-up optimization for SI.


  Date and Time

  Location

  Hosts

  Registration


  • Date: 29 Jan 2024
  • Time: 05:30 PM to 08:00 PM
  • All times are (UTC-08:00) Pacific Time (US & Canada)
  • Add_To_Calendar_icon Add Event to Calendar
  • 1120 Fulton Pl
  • Fremont, California
  • United States 94539
  • Contact Event Host
  • Starts 01 January 2024 04:30 PM
  • Ends 29 January 2024 08:30 PM
  • All times are (UTC-08:00) Pacific Time (US & Canada)
  • No Admission Charge

  Speakers

Chulsoon Hwang

Topic:

Machine learning applications in hardware design: SIPI perspective

In recent years, there has been a surge in the use of machine learning techniques across diverse domains, including hardware design. With the growing complexity of modern hardware systems, there arises a compelling demand for the development of more efficient and effective design methodologies. Machine learning can play a pivotal role and offer capabilities that were not possible in conventional ways. In this talk, recent progress in machine learning applications in hardware design, with a specific focus on SI/PI, will be introduced. The case studies include: 1) PDN impedance prediction, 2) pre/post-layout decap optimization, and 3) stack-up optimization for SI.

 

Biography:

Chulsoon Hwang is with the EMC Laboratory at Missouri S&T. He received his Ph.D. degree from KAIST, Daejeon, South Korea in 2012. From 2012 to 2015, he was with Samsung Electronics as a Senior Engineer. In 2015, he joined the Missouri S&T where he is currently an Associate Professor. He has authored or co-authored 150+ IEEE journal/conference papers. His research area includes signal/power integrity, RF desense, and machine learning applications in hardware design. 

Dr. Hwang was a recipient of the Google Faculty Research Award, and Missouri S&T’s Faculty Research Award. He was a co-recipient of 10+ Best Paper/Best Student Paper Awards from various conferences including the IEEE EMC+SIPI, the AP-EMC, and the DesignCon.

 

 

Address:United States