MODELING FINFETS, NANOWIRES AND NANOSHEETS
The transition from two-dimensional (2D) transistors to three-dimensional (3D) transistors at the beginning of the 21st century required the development of new models for 3D transistors. The work of developing models of semiconductor devices is a typical activity of the Academy, which our group followed, beginning the development of a new model for 3D FinFET devices, in 2006. These devices have a silicon fin, surrounded by three gates, two laterals and one on the top. The Si layer is narrow enough, creating a potential distribution across its thickness, where the potential at the center is different from zero. Considering this potential distribution and the fact that the Si layer is doped, lead to a transcendental equation for the distribution of the electric field from gate to gate, that has no direct analytical solution.
In this presentation we will show an example of a compact, continuous and analytical model known as Symmetric Doped Double-Gate Model (SDDGM), where the indicate problems were solved. The model was complemented with variable mobility, the effects of short channel, leakage currents and dependence on ambient temperature. In addition, it was demonstrated that this model can be used to model also recent 3D structures, such as nanowires, nanosheets and stacked nanosheets. Validation of the using this model for these new devices will be shown. SDDGM was implemented in the circuit simulator SmartSPICE, using Verilog-A language.
Even today, the development of more precise models, as well as complements for applying them to new devices, is an open topic for the Academy.
Date and Time
Location
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- Date: 17 Apr 2024
- Time: 02:00 PM to 03:00 PM
- All times are (UTC-03:00) Brasilia
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- Centro Universitario FEI
- Av. Humberto de A. C. Branco, 3972
- Sao Bernardo do Campo, Sao Paulo
- Brazil 09850901
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- Co-sponsored by Centro Universitario FEI
Speakers
Dr. Antonio Cerdeira of CINVESTAV
MODELING FINFETS, NANOWIRES AND NANOSHEETS
Biography:
Prof. Antonio Cerdeira Altuzarra - He received the M.Sc. degree in physics from Moscow State University, Russia, in 1966 and the Ph.D. degree from the NW Leningrad Polytechnic Institute, Russia, in 1977.
Since 1966, he has been engaged in research, teaching and development in the field of microelectronics, including design, technology, characterization, simulation and modeling. He has been Professor at the Faculty of Physics, 1966-1979 and Director of the Solid-State Electronics Research Laboratory, 1968-1979, at University of Havana; head of Research Department at INSAC in Cuba, 1979-1990, head of Microelectronic Department at International Center of Informatics in Moscow, 1990-1994, and since 1995 he is a Full Professor at the Section of Solid-State Electronics, Department of Electrical Engineering, Center of Research and Advanced Studies (CINVESTAV) in México City. He has also been head of 14 research and infrastructure projects; author, coauthor of more than 300 technical papers and 4 patents. His actual research interest is in the field of modeling and characterization of multigate nanometric MOSFETs and Thin-Film Transistors (TFT), including the non-linear behavior of devices and circuits.
Prof. Cerdeira is a Life Senior Member of the IEEE and IEEE Electron Devices Society Distinguished Lecturer.
Email:
Address:CINVESTAV, , Mexico City, Mexico