IEEE SIGHT JUIT Intercollege Quiz on VLSI Designs and Sustainability
Objective:
The two-day Intercollege Quiz on VLSI Designs and Sustainability, organized by IEEE JUIT Student Branch in collaboration with VLSI, aimed to promote knowledge and awareness in the fields of Very Large Scale Integration (VLSI) technology and sustainable practices within the industry.
Day 1: March 7th, 2024 - Preliminary Rounds and Introduction to VLSI:
The event commenced with preliminary rounds of the quiz competition, where teams from participating colleges showcased their knowledge of VLSI designs and concepts. Following the quiz rounds, an introductory session on VLSI technology was conducted, covering fundamental concepts such as semiconductor basics, CMOS technology, and logic design.
Day 2: March 8th, 2024 - Advanced Topics, Sustainability, and Final Rounds:
The second day featured advanced topics in VLSI design and sustainability practices within the industry. Sessions included discussions on ASIC design flow, FPGA programming, and emerging trends like System-on-Chip (SoC) and Internet of Things (IoT) integration. Additionally, speakers shared insights into sustainable practices in VLSI manufacturing and design, emphasizing the importance of eco-friendly approaches and minimizing environmental impact.
Highlights:
Engaging quiz competition stimulating intellectual competition among participants from various colleges.
Insightful sessions on advanced VLSI topics and sustainability practices, enriching participants' understanding of industry trends and challenges.
Networking opportunities with industry professionals, fostering collaboration and career development.
Certificate of participation awarded to all attendees, recognizing their contribution to the event.
Conclusion:
The IEEE JUIT SB Intercollege Quiz on VLSI Designs and Sustainability concluded successfully, with participants expressing appreciation for the enriching experience and valuable insights gained. The event provided a platform for students to showcase their knowledge, engage with industry experts, and explore sustainable practices within the VLSI industry. The collaboration between IEEE JUIT SB and VLSI exemplified the commitment to promoting technical education and fostering innovation among the student community.
Date and Time
Location
Hosts
Registration
- Start time: 07 Mar 2024 10:00 AM
- End time: 08 Mar 2024 04:35 PM
- All times are (UTC+05:30) Chennai
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- Jaypee University Of Information Technology
- Solan, Himachal Pradesh
- India 173234
- Room Number: LT-2
- Click here for Map
- Starts 01 March 2024 12:00 AM
- Ends 04 March 2024 12:02 PM
- All times are (UTC+05:30) Chennai
- No Admission Charge
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