IEEE FABulous - Week 4

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During the webinar we shall discuss about the most widely used digital IPs in the industry. These IPs are simple, very old yet sold in the market in billions. We will show the functionality and Verilog code to implement them


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  • Starts 11 September 2024 06:30 PM UTC
  • Ends 14 September 2024 06:30 AM UTC
  • No Admission Charge

  Speakers

Aloke Das of CEDA Bagalore

Topic:

Digital Designs for IEEE FABulous

During the webinar we shall discuss about the most widely used digital IPs in the industry. These IPs are simple, very old yet sold in the market in billions. We will show the functionality and Verilog code to implement them.

Biography:

Senior Member, IEEE
Chair, CEDA Bangalore
Fellow, IEI
Director, Lab and Lectures
M. Tech., IIT Delhi, India

Email:

Address:Prestige Technostar, , Bangalore, Karnataka, India




Agenda

We shall talk about the following digital designs.

  • VGA

  • PWM

  • SPI

  • I2C

  • UART

  • Memory

  • USB

  • Microprocessor