Co-Packaged Optics - Heterogeneous Integration of Photonic IC and Electronic IC

#photonics #copackaging #optics #HeterogeneousIntegration #electronics #IEEEDay
Share

Silicon photonics are the semiconductor integration of EIC and PIC on a silicon substrate (wafer) with complementary metal-oxide semiconductor (CMOS) technology. On the other hand, co-packaged optics (CPO) are heterogeneous integration packaging methods to integrate the optical engine (OE) which consists of photonic ICs (PIC) and the electrical engine (EE) which consists of the electronic ICs (EIC) as well as the switch ASIC (application specific IC). The advantages of CPO are: (a) to reduce the length of the electrical interface between the OE/EE (or PIC/EIC) and the ASIC, (b) to reduce the energy required to drive the signal, and (c) to cut the latency which leads to better electrical performance. In the next few years, we will see more implementations of a higher level of heterogeneous integration of PIC and EIC, whether it is for performance, form factor, power consumption or cost.


  Date and Time

  Location

  Hosts

  Registration


  • Date: 07 Oct 2024
  • Time: 11:00 AM to 01:00 PM
  • All times are (UTC-04:00) Eastern Time (US & Canada)
  • Add_To_Calendar_icon Add Event to Calendar
If you are not a robot, please complete the ReCAPTCHA to display virtual attendance info.
  • 170 College St
  • Toronto, Ontario
  • Canada M5S 3E3
  • Building: Haultain Building
  • Room Number: HA 401
  • Click here for Map
  • Contact Event Host
  • Starts 28 September 2024 12:00 AM
  • Ends 07 October 2024 10:00 AM
  • All times are (UTC-04:00) Eastern Time (US & Canada)
  • No Admission Charge

  Speakers

John H Lau of Unimicron Technology Corporation

Biography:

John H Lau, with more than 40 years of R&D and manufacturing experience in semiconductor packaging has published more than 533 peer-reviewed papers (380 are the principal investigator), 50 issued and pending US patents (32 are the principal inventor), and 23 textbooks (all are the first author) such as Chiplet Design and Heterogeneous Integration Packaging (Springer, 2023) and Flip Chip, Hybrid Bonding, Fan-In, and fan-Out Technology (Springer, 2024). John is an elected IEEE fellow, IMAPS Fellow, and ASME Fellow and has been actively participating in industry/academy/society meetings/conferences to contribute, learn, and share.   

 




Agenda

The content of this lecture is shown below.

  • Silicon Photonics

  • Data Centers

  • Optical Transceivers

  • Optical Engine (OE) and Electrical Engine (EE)

  • OBO (on-board optics)

  • NPO (near-board optics)

  • CPO (co-packaged optics)

  • Integration of the PIC and EIC

  • 2D Heterogeneous Integration of PIC and EIC

  • 2D Heterogeneous Integration of ASIC Switch, PIC and EIC

  • 2D Heterogeneous Integration of ASIC Switch, PIC and EIC with Bridges

  • 3D Heterogeneous Integration of PIC and EIC

  • 3D Heterogeneous Integration of ASIC Switch, PIC and EIC

  • 3D Heterogeneous Integration of ASIC Switch, PIC and EIC with Bridges

  • Heterogeneous Integration of ASIC Switch, PIC and EIC on Glass Substrate

  • Summary