Recent advances in signal and power integrity and AI/ML -Paid Workshops and FREE EXHIBITS - Secure your seat early! Spaces are limited.
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#power
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#packaging
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Free Exhibits (registration required still) during the event and also Happy Hour at 3:30pm
Agenda
- 8:30 AM Light breakfast and registration
- 9:00 AM Welcome remarks and introductions
Signal and Power Integrity
- 9:10 AM
Chander Ravva, Marvell Technology, Inc. IC Packaging for Data Centers Devices: High Speed Interconnects Powering Data Compute and Data Transfer - 9:45 AM
Dr. Victor Khilkevich, New Methods for High-FrequencyCharacterization of PCB Materials Missouri Univ. of Sci. and Tech. - 10:20 AM Break and vendor table-top show
- 10:45 AM
Dr. Hanfeng Wang, Google Inc. Introduction to Multi-Module PowerTree Simulation Flow - 11:20 AM Round Table Discussion - Future directions and challenges in SIPI
- 11:50 AM Lunch (included)
AI/ML in EMC+SIPI
- 12:50 PM
Dr. Lijun Jiang, Missouri Univ. of Sci. and Tech. An Outlook of Physical Layer Modeling Technologies for Complex Electromagnetics Environments Inspired by Machine Learning Methods - 1:25 PM
Baolong Li, Cadence Design Systems AI/ML for SIPI - 2:00 PM Break and vendor table-top show
- 2:25 PM
Dr. Chulsoon Hwang, Missouri Univ. of Sci. and Tech. Machine Learning-Assisted PDN Design - 3:00 PM Round Table Discussion - Future directions and challenges in AI/ML in EMC+SIPI
- 3:30 PM Happy Hour sponsored by Rhode and Schwarz
- 4:00 PM End of program
Date and Time
Location
Hosts
Registration
- Date: 22 Nov 2024
- Time: 08:30 AM to 03:30 PM
- All times are (UTC-08:00) Pacific Time (US & Canada)
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- 690 McCarthy Blvd
- Milpitas, California
- United States 95035
- Building: Rhode & Schwarz Conf. Center
Speakers
Chulsoon Hwang of Missouri University of Science and Technology
Topic:
AI for optimization of power integrity
Email:
Address:Rolla, United States, 65409
Baolong Li of Cadence
Topic:
AI/ML for advanced signal integrity design
Dr. Lijun Jiang of Missouri University of Science and Technology
Topic:
Application of AI/ML to EMC
Ravva Chander of Marvell Technology Inc
Topic:
Optical modules: SI, PI and packaging
Victor Khilkevich of Missouri Univ. of Sci. and Tech.
Topic:
New Methods for High-FrequencyCharacterization of PCB Materials
Hanfeng Wang of Google Inc
Topic:
Introduction to Multi-Module PowerTree Simulation Flow
Agenda
- What: Silicon Valley Area Workshop on EMC (SV-EMC) – Recent advances in signal and power integrity and AI/ML
- When: Friday, Nov. 22, 2024
- Where: Rhode & Schwarz, 690 McCarthy Blvd, Milpitas, CA-95035
- There will be a total of 6 invited speakers. We are still working on who all will speak, but following is our current list. The titles are tentative.
- The morning and afternoon sessions will be followed by a short round table discussion on major upcoming problems in the field that should be addressed in the near future.
- small table top show of companies in the EMC/SIPI area to show off their wares.
- There will be a modest charge for admission (around $100-150 with a discount for IEEE and/or EMC Society membership)
- A light breakfast, snacks, and lunch will be provided.
- Rhode & Schwarz will host a social hour with drinks after the event.
Exhibit is FREE to attend but registration is still required.