IEEE AESS - Securing Space Missions: Enhancing Satellite Cybersecurity with FPGA-Accelerated Secure Boot - Nicole Webb
Abstract: As the complexity of modern computers, embedded devices, and satellites increases, so does the need for stronger cybersecurity. Government agencies are mandating cybersecurity measures for new space missions, raising concerns among technology providers. This paper discusses the growing necessity of incorporating Secure Boot to enhance satellite security.
Secure Boot verifies the authenticity of an operating system or software before execution, starting with a root of trust that uses fixed keys and digital signatures for verification. While Secure Boot is commonly associated with the Unified Extensible Firmware Interface (UEFI) on consumer platforms, it is typically restricted to modern architectures.
Space platforms often operate at their computational limits, and introducing Secure Boot could further reduce their processing capacity. However, implementing Secure Boot on a Field Programmable Gate Array (FPGA) can prevent the processor from sharing the computational load, minimizing the impact on overall system performance. Furthermore, applying Secure Boot enhances security by making the configuration tamper-evident after initialization, preventing unauthorized modifications to the boot process. This immutability fortifies the system’s integrity and strengthens defenses against tampering or malicious attacks.
Given these challenges, dedicating an FPGA core to Secure Boot provides an effective solution. As cybersecurity demands for satellites increase, accelerating Secure Boot via an FPGA core mitigates the performance impact while significantly bolstering security. This approach addresses the unique needs of space platforms and offers a robust response to the evolving challenges of satellite cybersecurity.
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- Date: 12 Feb 2025
- Time: 12:00 PM to 01:00 PM
- All times are (UTC-06:00) Central Time (US & Canada)
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- Starts 16 January 2025 12:00 AM
- Ends 10 February 2025 12:00 AM
- All times are (UTC-06:00) Central Time (US & Canada)
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Cyber Security
Abstract: As the complexity of modern computers, embedded devices, and satellites increases, so does the need for stronger cybersecurity. Government agencies are mandating cybersecurity measures for new space missions, raising concerns among technology providers. This paper discusses the growing necessity of incorporating Secure Boot to enhance satellite security.
Secure Boot verifies the authenticity of an operating system or software before execution, starting with a root of trust that uses fixed keys and digital signatures for verification. While Secure Boot is commonly associated with the Unified Extensible Firmware Interface (UEFI) on consumer platforms, it is typically restricted to modern architectures.
Space platforms often operate at their computational limits, and introducing Secure Boot could further reduce their processing capacity. However, implementing Secure Boot on a Field Programmable Gate Array (FPGA) can prevent the processor from sharing the computational load, minimizing the impact on overall system performance. Furthermore, applying Secure Boot enhances security by making the configuration tamper-evident after initialization, preventing unauthorized modifications to the boot process. This immutability fortifies the system’s integrity and strengthens defenses against tampering or malicious attacks.
Given these challenges, dedicating an FPGA core to Secure Boot provides an effective solution. As cybersecurity demands for satellites increase, accelerating Secure Boot via an FPGA core mitigates the performance impact while significantly bolstering security. This approach addresses the unique needs of space platforms and offers a robust response to the evolving challenges of satellite cybersecurity.
Biography:
Nicole Webb received a B.S. in Electrical Engineering in 2020 and a M.S. in Computer and Electrical Engineering in 2022 from St. Mary’s University in San Antonio, TX. She is currently a research engineer in the Intelligent Systems Division at Southwest Research Institute under the High Reliability Systems department. Her research interests include cybersecurity, telemetry, flight software, and unmanned aerial systems. She is an FAA 14 CFR Part 107 sUAS Operator of 4 years and has over 300 logged flight hours. She also serves as the chair of the IEEE Lone Star Section joint SMC/AESS/SYS chapter.
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