Eric Perfecto of IBM

This talk will cover the fundamentals aspects of flip chip fabrication and assembly technologies as applied to fine pitch Cu-Pillars. The introduction of the High-density Memory Module (HBM) at 55um couple with Heterogenous Integration initiated a revolution in packaging.  Cu Pillars, which were initially used to replace wire bonding for perimeter interconnects in the organic laminate, were adapted for area array flip-chip pitch reduction for advanced packages.  New technologies, such as advanced laminates, fan-out wafer-level packaging (FO-WLP), Si-bridge, interposers and hybrid bonding are being combined to produce the very advanced packages that we see today.  The talk with explain the Cu-pillar fabrication and assembly process options and implementations issues.  Also, examples of various annouintence products will be examined with focus on their packaging structures the integration of Cu-Pillar into those structures.

Biography:

Eric Perfecto has over 42 years of experience working in the development and implementation of flip chip and advanced Si packaging at IBM and GlobalFoundries. Internationally recognized packaging process expert in the areas of solder interconnects for C4 and u-Pillar interconnect, Cu-polymer multi-level structures, 2.5 and 3D wafer finishing and assembly. Extensive experience in the development of electronic packages and scale-up to manufacturing. Eric is currently working at IBM Heterogeneous Integration area at Albany developing AI accelerators packages. He holds a M.S. in Chemical Engineering from the University of Illinois and a M.S. in Operations Research from Union College. Eric holds 60 US patents and has published over 80 papers in conferences and journals, including two best Conference Paper Awards and the 1994 Prize Paper Award from CMPT Trans. on Adv. Packaging. He was the 57th ECTC General Chair in Reno, NV, and the Program Chair at the 55th ECTC. Eric is an IEEE Fellow, an EPS Distinguished Lecturer and the current EPS VP of Education.