IEEE Electron Devices Distinguished Lecture by Prof. Ram Achar

#interconnects #highspeed #modeling
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Host: Prof. Laura Bégon-Lours, Neuromorphic Electronics with Oxides, Institute of Integrated Systems, Dept. of Information Technology and Electrical Engineering, ETH Zürich.


IEEE EDS Distinguished Lecture

Emerging High-Speed Nanoscale Interconnect Issues and Modelling Challenges


Prof. Ramachandra Achar, Ph. D., P. Eng.,

IEEE Fellow, Fellow EIC

Professor, Department of Electronics,

Carleton University, Ottawa, Ontario - K1S 5B6

Email: achar@doe.carleton.ca

URL:   www.doe.carleton.ca/~achar

 

Abstract: With the increasing demands for higher signal speeds coupled with the need for decreasing feature sizes, interconnect related signal integrity effects such as delay, distortion, reflections, crosstalk, ground bounce and electromagnetic interference have become the dominant factors limiting the performance of high-speed systems. These effects can be diverse and can seriously impact the design performance at all hierarchical levels including integrated circuits, printed circuit boards, multi-chip modules and backplanes. This talk provides a comprehensive approach for understanding the multidisciplinary problem of signal integrity: issues/modeling/analysis in high-speed design.

 

 



  Date and Time

  Location

  Hosts

  Registration



  • Date: 05 May 2025
  • Time: 12:00 PM UTC to 02:00 PM UTC
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  • ETH Zürich D-ITET
  • Gloriastrasse 35
  • Zürich, Switzerland
  • Switzerland
  • Building: GLC
  • Room Number: GLC E 34

  • Contact Event Host
  • Starts 12 March 2025 09:30 AM UTC
  • Ends 04 May 2025 10:00 PM UTC
  • No Admission Charge


  Speakers

Ram Achar

Biography:

Prof. Achar currently is a professor in the department of electronics engineering at Carleton University, Canada (since 2000). He also served in various capacities in leading research labs, including T. J. Watson Research Center, IBM, New York (1995), Larsen and Toubro Engineers Ltd., Mysore (1992), Central Electronics Engineering Research Institute, Pilani, India (1992) and Indian Institute of Science, Bangalore, India (1990).  He has published over 250 peer-reviewed articles in international transactions/conferences, six multimedia books on signal integrity and five chapters in different books and has received numerous prestigious awards recognizing his research contributions. His research interests include signal/power integrity analysis, high-speed interconnects, circuit simulation, parallel and numerical algorithms and microwave/RF/EMC/EMI mixed-domain analysis. Prof. Achar currently serves as a Distinguished Lecturer of the IEEE Electronic Devices Society and IEEE Electronic Packaging Society, Chair of the Distinguished Lecturer of program of IEEE EMC Society. He also serves in several executive/steering/advisory/technical-program committees of several leading IEEE international conferences, such as EPEPS, EDAPS and SPI etc.  Dr. Achar is a practicing professional engineer of Ontario, a Fellow of Engineers Institute of Canada and IEEE.

Address:Department of Electronics, Carleton University, Ottawa, Ontario, Canada, K1S 5B6





Agenda

14:00: Welcome

14:15: Lecture

15:00 - 16:00 Q&A and discussions