Radiation Hardened CMOS Circuits


Soft errors have long plagued the semiconductor field, first showing up in space applications and later in terrestrial applications. Technology scaling and low-voltage/low-power requirements are further exacerbating the occurrence of soft errors in nano-scale circuits.  A soft error occurs when charge generated by energetic particles is collected by reverse-biased junctions. In this talk, we will review the background and highlight recent research done at the University of Waterloo on circuit techniques to mitigate soft errors.

  Date and Time




  • University of Windsor
  • windsor, Ontario
  • Canada N9B3P1
  • Building: CEI Building
  • Room Number: 3000
  • Starts 09 November 2017 12:00 AM
  • Ends 17 November 2017 10:00 AM
  • All times are Canada/Eastern
  • No Admission Charge
  • Register


Manoj Sachdev


Radiation Hardened CMOS Circuits




Manoj Sachdev is a professor in electrical and computer engineering department at the University of Waterloo. His research interests include low-power and high-performance circuit design, reliability and manufacturing issues of nano-metric integrated circuits. He has written five books, has contributed to over 200 technical articles in conferences and journals. He holds more than 35 granted and pending US patents in the broad area of VLSI circuit design and test.


He, his students, and his colleagues have received several international awards. In 1997, at the IEEE European Design and Test Conference, he received the best paper award. In 1998, he was a co-recipient of the honorable mentioned award in the IEEE International Test Conference. He received the best panel award in 2004 IEEE VLSI Test Symposium. In 2011, he was a co-recipient of the best paper award in IEEE International Symposium on Quality Electronics Design. In 2015, he was co-recipient of the best poster award in IEEE Custom Integrated Circuits Conference. He is a Fellow of IEEE, Engineering Institute of Canada, and Canadian Academy of Engineering.