The impact on EMC, SI, and PI when using Ultra-Thin Laminates in PCB’s

#EMC;PCB;SI #EMC #Integrity
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The increase in data rates and processing speeds driven by AI and next generation device complexity, require more precise filtering, improved signals, and power with less noise. This discussion will focus on the newest studies showing how using some ultra-thin and high Dk laminates in PCB’s will improve the EMC, SI and PI.  It also shows benefits to space utilization, and stack-up thicknesses.



  Date and Time

  Location

  Hosts

  Registration



  • Date: 23 Jun 2025
  • Time: 10:30 PM UTC to 11:30 PM UTC
  • Add_To_Calendar_icon Add Event to Calendar
  • Intertek USA, 70 Codman Hill Rd.
  • Boxborough, Massachusetts
  • United States 01719

  • Contact Event Host
  • Nicholas Abbondante

    Global Chief Engineer, EMC, Intertek

    nicholas.abbondante@intertek.com

     

  • Co-sponsored by Intertek USA
  • Starts 22 May 2025 04:00 AM UTC
  • Ends 20 June 2025 04:00 AM UTC
  • No Admission Charge


  Speakers

Bob of Oak-Mitsui Technologies

Topic:

The impact on EMC, SI, and PI when using Ultra-Thin Laminates in PCB’s

The increase in data rates and processing speeds driven by AI and next generation device complexity, require more precise filtering, improved signals, and power with less noise. This discussion will focus on the newest studies showing how using some ultra-thin and high Dk laminates in PCB’s will improve the EMC, SI and PI.  It also shows benefits to space utilization, and stack-up thicknesses.

Biography:

Bob is Vice President of Marketing, Business Development, and Technology for Oak-Mitsui’s

FaradFlex ultra-thin embedded capacitance materials and support of advanced technology VSP

and Micro-Thin copper.

He has over 35 years of professional experience in printed circuits, advanced electronic

materials, MEM’s, RF modules, sensors, and chip packaging at companies such as Xerox, M-

Flex, Rogers Corporation, and Panasonic Electronic Materials. He studied Chemical & Materials

Engineering and Business Management at California Polytechnic University, Pomona, California

and Grand Canyon University, Phoenix, Arizona

Email:

John of Oak-Mitsui Technologies

Topic:

The impact on EMC, SI, and PI when using Ultra-Thin Laminates in PCB’s

The increase in data rates and processing speeds driven by AI and next generation device complexity, require more precise filtering, improved signals, and power with less noise. This discussion will focus on the newest studies showing how using some ultra-thin and high Dk laminates in PCB’s will improve the EMC, SI and PI.  It also shows benefits to space utilization, and stack-up thicknesses.

Biography:

 

John Ranieri is the OEM Marketing Director for Oak-Mitsui Technology’s FaradFlex™ laminates -

thin dielectrics for printed circuit board embedded capacitance. John has over 20 years’

experience in PCB materials at Oak-Mitsui and Rogers Corporation and has worked with OEM

customers designing a wide range of high frequency and high-speed PCBs. John’s holds a B.S. in

Chemical Engineering from Case Western Reserve University and an MBA from ASU’s W.P.

Carey School of Business.

 






Agenda

Agenda:

5:00 start, food/refreshments in cafeteria until 6:00

6:00-6:30 lab tour, return to cafeteria for presentations from 6:30-7:30+pm