VLSI for Beginners – From Fundamentals to Real-World Tools: A Hands-on Workshop Report”

#VLSI #Design #CMOS #Technology #Cadence #ADE #Analog #Circuit #Simulation #Layout #and #DRC #Career #Opportunities #in #Semiconductors
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"Empowering Innovation Through Silicon – A Journey from Basics to Real-World VLSI Design"
Organized by IEEE CAS Student Branch Chapter (SBC60030787), TKRCET in collaboration with CHIPIN Centre, CDAC


The two-day workshop titled “VLSI for Beginners – From Basics to Real World Design”, organized by the Department of Electronics and Communication Engineering, TKR College of Engineering and Technology in association with the IEEE CAS Student Branch Chapter (SBC60030787) and ChipIN Centre, CDAC, was held on 7th and 8th July 2025. On Day 1 (7th July 2025), the event commenced with an inaugural session at 9:30 AM, attended by dignitaries including the Principal, Dean Academics, Controller of Examinations, HoD-ECE, and the IEEE CAS Faculty Coordinator, who emphasized the significance of VLSI in modern electronics. The forenoon technical sessions began with Dr. P. Kalyani delivering a comprehensive talk on CMOS basics and VLSI design flow, followed by Dr. B. Srikanth’s session on CMOS inverters and common-source amplifiers. In the afternoon, students engaged in a hands-on session using Cadence ADE, where they designed and simulated CMOS inverters, analyzing voltage transfer characteristics and DC biasing.

On Day 2 (8th July 2025), Dr. B. Srikanth conducted a session on analog layout design, introducing students to layout design rules, DRC, LVS, and parasitic effects. This was followed by a session by Dr. P. Kalyani on career opportunities in the VLSI industry, where students gained insights into job roles, skillsets, and roadmap for entering the semiconductor domain. The afternoon hands-on session involved AC analysis of common-source amplifiers using Cadence, gain-bandwidth calculation, and layout implementation with DRC validation. Concepts such as Miller effect, layout-dependent effects, and pole-zero placement were discussed during live demos. The workshop concluded with a valedictory session at 4:30 PM, where participants shared their feedback and received certificates. A total of 81 B.Tech ECE students participated, gaining valuable knowledge and exposure to both theory and practical aspects of VLSI design.



  Date and Time

  Location

  Hosts

  Registration



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  • TKR College of Engineering and Technology Meerpet
  • hyderabad, Andhra Pradesh
  • India

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  Speakers

Dr. P. Kalyani

Assistant Professor,
Department of ECE, Vardhaman College of Engineering

Dr. P. Kalyani is a distinguished academician and researcher in the field of VLSI Design and Semiconductor Devices, currently serving as an Assistant Professor at Vardhaman College of Engineering. With a strong background in CMOS technology, analog and digital design, and EDA toolchains, she has been instrumental in mentoring undergraduate and postgraduate students in advanced electronics. Her research interests span across low-power VLSI, analog signal processing, and device modeling. Dr. Kalyani has published multiple papers in reputed journals and actively engages in technical workshops and faculty development programs to bridge the gap between academia and industry. In this workshop, she delivered impactful sessions on CMOS fundamentals, career opportunities in the VLSI industry, and guided students in Cadence ADE-based simulations, making complex concepts accessible to beginners.

Dr. B. Srikanth

Assistant Professor,
Department of ECE, Vardhaman College of Engineering

Dr. B. Srikanth is an experienced educator and researcher specializing in Analog and Mixed-Signal IC Design, currently working as an Assistant Professor at Vardhaman College of Engineering. His expertise lies in circuit-level design, layout practices, simulation techniques, and the usage of industry-standard tools such as Cadence Virtuoso. He has actively contributed to student training programs, academic research, and hands-on workshops focusing on the practical aspects of semiconductor design. During the workshop, Dr. Srikanth led technical sessions on inverter design, common-source amplifier modeling, layout design rules, DRC/LVS checks, and conducted live demonstrations on parasitic extraction and layout-dependent effects. His deep technical knowledge and interactive teaching style greatly enhanced the participants’






Agenda

“VLSI for Beginners – From Basics to Real World Design”
held on 7th & 8th July 2025 at TKR College of Engineering and Technology, organized by the IEEE CAS Student Branch Chapter (SBC60030787) in association with CHIPIN Centre, CDAC and ECE Department:


Day 1 – 7th July 2025 (Monday)

Time Session Details
09:30 AM – 10:00 AM Inaugural Session
Welcome by dignitaries – Principal, Dean, HoD, IEEE Coordinator
10:00 AM – 11:30 AM Session I: Introduction to VLSI & CMOS Basics
Speaker: Dr. P. Kalyani
11:45 AM – 01:00 PM Session II: CMOS Inverter & Common Source Amplifier
Speaker: Dr. B. Srikanth
01:00 PM – 02:00 PM Lunch Break
02:00 PM – 04:30 PM Hands-on Session I: Cadence ADE – Inverter Simulation & DC Biasing


Day 2 – 8th July 2025 (Tuesday)

Time Session Details
09:30 AM – 11:00 AM Session IV: Layout Design, DRC & LVS Concepts
Speaker: Dr. B. Srikanth
11:15 AM – 01:00 PM Session V: Career Opportunities in VLSI Industry
Speaker: Dr. P. Kalyani
01:00 PM – 02:00 PM Lunch Break
02:00 PM – 04:30 PM Hands-on Session II: AC Analysis & Layout Design in Cadence
04:30 PM onwards Valedictory Session & Certificate Distribution



A total of 81 B.Tech ECE students participated, gaining valuable knowledge and exposure to both theory and practical aspects of VLSI design.