John of Penn State Applied Research Laboratory- EOE Division

“Lucky Times” refer to what insomniacs see on their digital clocks in the middle of the night- 11:11, 2:22- or 12:34, 4:56- or 1:59 (by 4s), 3:57 (by 2s) etc. We know that long ago people lived by day and night time. Today however, time to the second or minute seems important in our daily lives. We understand how the earth and other entities work together and influence each other to nanosecond precision. This presentation will cover some observations in the evolution of timekeeping. We begin with some history and math (of course) about the common factors of numbers 12, 24, and 60, oh yes…and 7. Then we’ll dwell a bit on the arrival of the metric system using base 10, and how that has confounded computing ever since. The successive inventions of clocks, watches, and other displays will be coverJoghned, up to displays that share much more information.

Biography:

John Mazurowski has BS and MS degrees in Physics from Syracuse University. He is the Director of the Electronics Manufacturing Center, a Navy Manufacturing Technology Center of Excellence, at the Penn State Applied Research Laboratory. He is the chair of the IEEE Photonics Standards Committee, chair of the IEEE Pittsburgh Electronic Packaging and Electron Devices Chapter, former chair of the SAE AS-3 Fiber Optic and Applied Photonics Committee, and former chair of the IMAPS Cleveland/Pittsburgh chapter.  He is a Senior Member of the IEEE, a member of IMAPS, and a member of SAE Aerospace Avionics Systems Division.

Email:

Address:Pennsylvania, United States

Amit of Coupa Software

As Large Language Model (LLM) agents transition from experimental prototypes to real-world deployments, ensuring production readiness becomes critical. This paper, “From Prototype to Production: Proving Agent Readiness,” presents a systematic approach with a structured framework for validating agent reliability, safety, and scalability before launch. It emphasizes the risks of premature deployment - hallucinations, compliance failures, and reputational damage - and defines measurable readiness criteria spanning accuracy, latency, observability, and cost predictability. The paper also introduces testing frameworks such as RAGAS, LangSmith, TruLens, and DeepEval for evaluating correctness, context grounding, and retrieval precision, alongside safety and red-teaming protocols. A practical readiness checklist and a phased Maturity Model - Prototype → Pilot → Beta → Production - illustrate progressive validation with quantifiable exit thresholds (e.g., RAGAS Correctness ≥ 85%, Retrieval Recall ≥ 90%, p95 Latency ≤ 2 s). Attendees will gain actionable methods to transform LLM prototypes into robust, trustworthy, and production-grade AI agents fit for enterprise and regulatory environments.

Biography:

Amit Chaudhary is a Lead Software Engineer at Coupa with 18+ years in enterprise software and cloud-native platforms. He specializes in test-automation frameworks and AI/ML-driven solutions for enterprise risk assessment, software quality, and CI/CD automation. His work includes NLP-based multi-dialect search systems, large-scale reliability engineering, and optimization initiatives that have driven >99% test coverage with materially lower defect leakage. At Coupa, he scales deployment workflows and operational guardrails to improve availability and MTTR while reducing change risk in multi-tenant SaaS. His interests include developer experience, evidence-based quality (traceable acceptance criteria), and resilient rollback strategies. Proficient in Java, Python, Selenium, and Cucumber, he has built frameworks achieving 80%+ automation coverage and streamlined CI/CD with GitHub Actions and Groovy pipelines, reducing deployment time by ~40%. He has led Agile transformations and POCs that shortened release cycles by ~30%, and developed AI-assisted tools that cut manual testing by ~60%. He has published research, contributed to patents, and is an active IEEE Senior member active.

Durga of Cognizant Technology Solutions

In-store cloud migration unlocks real-time fraud prevention through negative coupon files, dynamic cloud databases flagging invalid offers at online shopping and POS. As a Product Manager, I've led migrations reducing fraud by 40% via AI-validated scans. This talk outlines a phased strategy: assessing legacy POS for hybrid cloud readiness, integrating edge APIs for 200ms validations, and deploying negative files (e.g., blocking counterfeits per Inmar CNFRM). Engineering challenges like data latency and security are addressed with BGP-optimized networks and encryption. Drawing from retail deployments, we'll explore PM roadmaps for ROI, fewer chargebacks, scalable analytics and future AI enhancements against evolving scams like coupon stacking. Attendees gain frameworks to migrate in-store systems securely, fortifying retail against $600M annual losses while boosting efficiency. Ideal for engineers bridging cloud infra to fraud-resilient products.

Biography:

Ms. Durga Krishnamoorthy is a Senior IEEE member who is an active member of R2 Pittsburgh chapter. Besides her Industry roles as a Digital Product Management Leader with 12+ years at the intersection of Data Engineering, Cloud and Machine Learning in Retail and Fintech, she actively served as TPC chair, Session Chair at various IEEE Conferences across India, USA and Tunisia. I have contributed to 80+ paper reviews across the last 3 years in IEEE and also featured as Sponsorship Chair for IEEE Young Professional Summit in 2026.

Dave of Curtiss-Wright Electromechanical Systems, Cheswick, PA

Linear induction motors are under development for a variety of demanding applications, including aircraft launching, people movers, and magnetically levitated trains. These applications require machines that can produce large forces, operate at high speeds, and can be controlled precisely to meet performance requirements. This presentation describes techniques for modeling and controlling linear induction machines based on a direct and quadrature representation of the system dynamics. The presentation also describes the design and construction of a 10.67 m (35 ft) long, 20.56 m/s (46 mph) top speed linear induction motor for testing control algorithms and verifying simulation results. Simulation results are presented and compared to test data from the linear motor system. If time permits, a video of the motor in operation will be shown.

Biography:

David Hall (IEEE Member 1983, IEEE Senior Member 1997) received the B.S. degree in electrical engineering from Carnegie Mellon University, Pittsburgh, PA, in 1983, the M.S. degree in electrical engineering from the Air Force Institute of Technology, Wright-Patterson Air Force Base, OH, in 1984, and the Ph.D. degree in electrical engineering from the University of Pittsburgh in 1997. He served as an officer in the United States Air Force from 1983 through 1988. During 1989-1999, he was with the Westinghouse Electric Corporation, Science and Technology Center in Pittsburgh. From 1999-2017 he was with Curtiss-Wright Advanced Products and Systems in Mount Pleasant, PA and from 2017-2024 he was with Curtiss-Wright Electromechanical Systems in Cheswick, PA. He was selected to be a Curtiss-Wright Corporation Technical Fellow in 2023. He continues as a technical consultant to Curtiss-Wright in Cheswick, PA.

Address:Pennsylvania, United States

Sabareesh of AVEVA

AI-assisted development tools such as GitHub Copilot and Cursor/Claude are rapidly transforming software engineering by shifting effort from manual implementation to the governance of code generation, delivering significant gains in speed while introducing new technical risks. This talk presents a systems-oriented, engineering-focused framework for adopting AI-assisted development in professional software teams without compromising architectural integrity, security, or long-term maintainability. Grounded in Conway’s Law and supported by empirical research on organizational mirroring and AI pair programming, the session examines how AI can amplify both healthy and unhealthy team communication structures, leading to architectural drift, inconsistent abstractions, and weakened review practices if left unmanaged. Drawing on real-world experience building and maintaining production software, the talk introduces concrete technical controls including repository-level AI instructions, invariant-driven code reviews, automated enforcement pipelines, and ownership-aware workflows that enable teams to scale AI usage while preserving system coherence, reliability, and operational discipline.

Biography:

Sabareesh Kappagantu is a software engineering leader with extensive experience building and managing teams that develop large-scale, production software systems. He currently works on industrial intelligence software at AVEVA, where his work focuses on platforms that support complex data flows, long-lived codebases, and mission-critical operational workflows. Earlier in his career, he worked on user behavior analytics and digital experience platforms, gaining deep exposure to system observability, reliability, and product-scale software engineering.

Sabareesh has led and mentored multidisciplinary engineering teams across backend, platform, and application layers, with a strong emphasis on architectural integrity, developer productivity, and sustainable delivery practices. He is the Chief Editor of the AVEVA Tech Blog, where he curates and publishes technical articles on software architecture, performance engineering, and modern development practices. More recently, he has explored AI-assisted development using tools such as GitHub Copilot, Claude, and Cursor, including building and publishing mobile applications to the Apple App Store and Google Play Store. His professional interests include AI-augmented software engineering, organizational influences on system architecture, developer tooling, and the application of foundational principles such as Conway’s Law to modern, AI-enabled development environments.

Address:California, United States

Thomas of Eaton Advanced Power Systems

Primary switching of transformers plays a vital role in the operation of critical utility, industrial and commercial medium voltage power distribution systems. Transformers of all designs such as power, VT, CPT, RVAT, etc. are at risk of failure due to continually evolving changes in circuit design topologies and switching operations demanded by all types of industry. Engineers designing medium voltage distribution systems will be made aware of the real possibility of transformer failure due to switching transients, as well as the practical solutions available so they can be incorporated at the design stage. Attendees will learn from actual examples drawn from the investigation of several hundred transformer failures spanning a variety of installations and the application of successful transient mitigation solutions. Topics covered include transient overvoltages, internal resonance, ferroresonance, power transformers, VTs, CPTs, failures, analysis and solutions.

Biography:

Thomas J. Dionise, PE, (S’79-M’82-SM’87-F’19-LF’25) B.S.E.E. from The Pennsylvania State University in 1982, and the M.S.E.E. in Power from Carnegie Mellon University in 1984. He is currently a Principal Engineer in the Advanced Power Systems Department, Eaton Corporation. He has 43 years of power system experience involving analytical studies and power quality investigations of industrial and commercial power systems. He has specialized in switching transients, transient overvoltage protection, power quality, harmonic analysis and harmonic filter design. He has co-authored over 45 papers, several of which received IAS Transactions, Magazine, and conference Prize Paper Awards. Mr. Dionise is past Chair of the IEEE IAS Metal Industry Committee and presently serves as Chair of its Standards Subcommittee. Additionally, he is a member of AIST Electrical Applications Technical Committee and a licensed Professional Engineer in Pennsylvania.

Address:Pennsylvania, United States

Kartik of Torc Robotics

Hardware-in-the-Loop (HIL) validation has become a cornerstone of both traditional automotive development and next-generation autonomous-vehicle systems. As vehicles transition into software-defined platforms with complex ECUs, sensors, and AI-driven modules, system-level robustness cannot rely on road testing alone. This talk explains the full lifecycle of designing, building, and deploying HIL systems: defining validation requirements, mapping real-world interfaces, developing high-fidelity plant models, selecting real-time hardware, designing I/O and signal-conditioning paths, and integrating automotive networks such as CAN, LIN, FlexRay, and Automotive Ethernet. We discuss how complete HIL architectures enable closed-loop testing of powertrain, chassis, ADAS perception, planning, and control under deterministic, repeatable, and safety-aligned scenarios. Emphasis is placed on validating safety-critical functions—including ABS/ESP logic, sensor fusion, trajectory generation, and fault-injection workflows. The session also highlights emerging trends such as AI-generated scenarios, sensor-prognostic modeling, and UL 4600/SOTIF-aligned validation pipelines that accelerate certifiable deployment.

Biography:

Kartik Srinivasan is a Staff Systems Engineer specializing in Hardware-in-the-Loop (HIL) Verification & Validation (V&V) for autonomous vehicles. With over a decade of experience across automotive and autonomous mobility systems, he has played a pivotal role in shaping HIL V&V strategies for Level-4 autonomous trucks at Torc Robotics. His expertise spans HIL architecture design, system integration, closed-loop simulation, and test automation for safety-critical vehicle functions. Previously, Kartik led HIL validation initiatives at Motional, where he contributed to the development of Drive-by-Wire and Perception subsystem testing frameworks. His earlier work at Nexteer Automotive and LG Chemical Power strengthened his foundation in mechatronic test benches, functional safety engineering, and battery management systems. Kartik holds a Master’s degree in Electrical Engineering from Michigan Technological University. He is passionate about AV safety, AI-assisted validation, and scalable test frameworks, and has actively contributed to the advancement of autonomous mobility with 4 U.S. patents filed (Patent Pending). He is an IEEE Senior Member and, in Dec 2025, was inducted as a Professional Member of IEEE Eta Kappa Nu (HKN) into the Eta Chapter of the Board of Governors, recognizing his sustained technical contributions and leadership in the field.

Address:Pennsylvania, United States

Lava of Delmarva Power (Exelon), Delaware

Transmission line ratings have traditionally been based on conservative seasonal assumptions that prioritize safety but often leave valuable capacity unused. As load growth, renewable integration, and climate variability place new stress on the grid, these static approaches are increasingly difficult to justify. FERC Order No. 881 responds to this challenge by requiring transmission providers to adopt ambient-adjusted ratings, tying line capacity more directly to actual weather conditions and physical conductor behavior.

This talk looks at Order 881 from a practical engineering perspective, grounded in conductor thermal physics, sag-clearance limitations, and real-world operational constraints. It discusses how ambient temperature, wind, and solar effects influence conductor temperature and ampacity, drawing on established models such as IEEE Std 738, while also highlighting the uncertainties that arise when these models are applied in operational environments.

A key focus of the session is the role of conductor type and material choice in determining how much value utilities can realistically extract from ambient-adjusted ratings. Conventional ACSR conductors, while widely deployed, are often clearance-limited and offer modest flexibility. In contrast, high-temperature low-sag and composite-core conductors provide greater thermal headroom and more predictable sag behavior, making them better aligned with the intent of Order 881.

Rather than treating the rule as a compliance exercise, the talk frames Order 881 as a step toward more adaptive, data-informed transmission operations, and a bridge to dynamic line rating and advanced asset management. The discussion emphasizes how thoughtful integration of conductor technology, weather data, and operational practices can improve reliability and utilization without expanding rights-of-way.

Biography:

Lava K. Vandrangi is a Senior Transmission Engineer at Exelon, with over 15 years of industry experience spanning transmission and substation engineering. He is currently pursuing his Ph.D. at Harrisburg University of Science and Technology and holds a master’s degree in construction management and a bachelor’s degree in civil engineering. His professional experience includes transmission line design considerations, conductor performance evaluation, and addressing the practical challenges of aligning engineering standards with operational and regulatory requirements. Mr. Vandrangi is an IEEE Senior Member and a member of Eta Kappa Nu (HKN). He currently serves as PES/IAS Chapter Chair for the IEEE Delaware Section and as Section Chair-Elect 2026-2027. His professional interests include ambient-adjusted and dynamic line ratings, advanced conductor technologies, and the application of analytics to improve transmission system performance. He is also engaged in innovation activities at Exelon and is currently working toward the finalization of a US patent related to the application of artificial intelligence for construction outage sequencing in the utility industry.

Address:Delaware, United States

Kalyan of Sen Engineering Solutions, Inc.

Electric power sources are frequently located away from population centers. Therefore, the electricity must be transported from the power sources to consumers through transmission and distribution lines. The voltage changes its magnitude and phase angle at any point along a line due to the voltage drop across the line impedance, which is caused by the flow of current in the line. However, the voltage at a point-of-common-coupling with a load must be maintained within the regulatory limits. Voltage regulation techniques have been practiced in power grid applications with the use of inductors, capacitors, transformers and load tap changers (LTCs) since the earlier days of electrical engineering. However, the latest trend is to use more and more power electronics-based solutions. Even though the costs of the available solutions vary widely, the basic underlying theory of voltage regulation is still the same as it has always been. The voltage control techniques are applicable in electric transmission lines as well as various other applications, such as motor drives, flicker control, harmonic mitigation, and so on. In examining the various solutions for voltage regulation, the presenter discusses how these solutions address both functional needs and cost demands. The audience will hear from an expert who actually designed and commissioned a number of power electronics-based FACTS controllers since their inceptions in the 1990s.

Biography:

Kalyan Sen (S’83-M’87-SM’01-F’21-LF’25) is the President & CTO of Sen Engineering Solutions, Inc. (www.sentransformer.com) that specializes in developing SMART power flow controllers—a functional requirements-based and cost-effective solution. Kalyan worked for 33 years in academia and industry. He was a key member of the FACTS development team at the Westinghouse STC for which he became a Westinghouse Fellow Engineer. He contributed to concept development, simulation, design, and commissioning of FACTS projects at Westinghouse. He conceived some of the basic concepts in power flow control technology for which he was elevated to the IEEE Fellow grade with the citation: for the development and application of power flow control technology. He is the Co-inventor of the Sen Transformer, which is commercially available to regulate ±6.5 MVA line power in a 33 kV line. Kalyan holds BEE, MSEE, and PhD-EE degrees and an MBA. He is a licensed PE in Pennsylvania and New York.

He has been serving as an IEEE PES Distinguished Lecturer since 2002. In that capacity, he has given presentations on power flow control technology more than 200 times in 20 countries. He serves IEEE SSIT Board of Governors as Education Committee Chair and President-Elect (2025-2026). He also serves IEEE Region 2 as its Professional Activities Chair.

Email:

Address:Pennsylvania, United States