EDS Webinar: Evolution of metal-oxide-semiconductor device architectures and the corresponding requirements on epitaxial growth processes
EDS Webinar:
Evolution of metal-oxide-semiconductor device architectures and the corresponding requirements on epitaxial growth processes
After a short description of the evolution of metal-oxide-semiconductor device architectures and the corresponding requirements on epitaxial growth processes, the material properties of complicated Si/SiGe multi-layer stacks used for complementary field effect transistor (CFET) devices, where gate-all-around nFETs and pFETs are stacked, will be discussed. The given layer stack contains two different Ge concentrations and has been grown using conventional process gases. A relatively high growth temperature is used to obtain acceptable Si and SiGe growth rates. 3D island growth has been suppressed for Ge concentrations up to 40%, despite the rather high growth temperature. Excellent structural and optical material properties of the Si/SiGe multi-layer stack will be reported, with up to 3 + 3 Si channels in the top and bottom part of the stack, respectively. The absence/presence of lattice defects has also been verified by room-temperature photoluminescence measurements. Photoluminescence measurements at low temperatures are used to study band-to-band luminescence from individual sub-layers and to illustrate the optical material quality of the CFET stack.
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Roger Loo
About the Speaker – Roger Loo, Ph.D.
Title: Principal Member of Technical Staff / Visiting Professor Ghent University
Roger Loo (ORCID: 0000-0003-3513-6058 and Web of Science ResearcherID: F-8392-2010) is a recognized authority in the field of fabrication of emerging semiconductor materials and its implementation in advanced electrical and optical device concepts. This includes the epitaxial growth of Group IV and III-V semiconductor materials, the fundamental understanding of material properties, and the assessment of new materials at device level.
Roger joined imec in January 1997. Since October 2013 he is a Principal Scientist (Principal Member of Technical Staff) in the group IV epi team. Since September 2023, he is also a visiting Professor (5%) at the Ghent University.
Agenda
EDS Webinar:
Evolution of metal-oxide-semiconductor device architectures and the corresponding requirements on epitaxial growth processes
Abstract:
After a short description of the evolution of metal-oxide-semiconductor device architectures and the corresponding requirements on epitaxial growth processes, the material properties of complicated Si/SiGe multi-layer stacks used for complementary field effect transistor (CFET) devices, where gate-all-around nFETs and pFETs are stacked, will be discussed. The given layer stack contains two different Ge concentrations and has been grown using conventional process gases. A relatively high growth temperature is used to obtain acceptable Si and SiGe growth rates. 3D island growth has been suppressed for Ge concentrations up to 40%, despite the rather high growth temperature. Excellent structural and optical material properties of the Si/SiGe multi-layer stack will be reported, with up to 3 + 3 Si channels in the top and bottom part of the stack, respectively. The absence/presence of lattice defects has also been verified by room-temperature photoluminescence measurements. Photoluminescence measurements at low temperatures are used to study band-to-band luminescence from individual sub-layers and to illustrate the optical material quality of the CFET stack.
