The Making of a Chip: Technology, Tools, and Careers
Specification to Silicon is an introductory technical and career-focused session designed to provide participants with a comprehensive overview of the complete ASIC development lifecycle. The event will guide attendees through each critical phase of chip creation, starting from system and ASIC/VLSI specifications, progressing through design and verification, and concluding with post-silicon validation.
Participants will gain insights into how real-world requirements are translated into silicon-ready designs, the role of RTL design and functional verification, and the importance of validation after fabrication to ensure performance, reliability, and compliance. In addition to the technical flow, the session will highlight current industry practices, tools, and skills required at each stage of the semiconductor lifecycle.
The event will also focus on career opportunities for graduates in the semiconductor industry, outlining various job roles such as ASIC/VLSI design engineer, verification engineer, validation engineer, and related entry-level positions. Industry expectations, essential skill sets, and career pathways will be discussed to help students and early-career professionals prepare for roles in chip design and development.
This session is ideal for engineering students and graduates who are interested in understanding ASIC/VLSI design workflows and exploring career opportunities in the semiconductor domain.
Date and Time
Location
Hosts
Registration
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- 6000 J Street
- Pacific Suite III (3rd Floor), The University Union, California State University
- Sacramento, California
- United States 95819
- Starts 12 January 2026 08:00 AM UTC
- Ends 24 February 2026 08:00 AM UTC
- No Admission Charge
- Menu: Vegetarian, Non-Vegetarian
Agenda
Tentative Agenda
6:00 PM – 6:15 PM
Welcome Note & Event Overview
6:15 PM – 7:00 PM
Architecture and ASIC Development Cycle
(From system requirements to design planning)
7:00 PM – 7:30 PM
ASIC Design and Verification
(RTL design, functional verification, and best practices)
7:30 PM – 8:00 PM
Post-Silicon Validation and Verification
(Debug, testing, and silicon bring-up)
8:00 PM – 8:30 PM
Career Opportunities in the Semiconductor Industry
(Roles, skills, and pathways for graduates)
8:30 PM
Conclusion & End of Event
🍕 Pizza will be served.
If you’re looking for a mentor or hoping to expand your professional network, this is the perfect chance to connect and learn from experts and peers.