A Technical Talk on “ASIC Design Beyond Theory: Industry Experience and Practice”

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The IEEE CEDA DSCE Student Chapter organized a technical talk titled “ASIC Design Beyond Theory: Industry Experience and Practice” on 6th March 2026 at the Department of Electronics and Communication Engineering, Dayananda Sagar College of Engineering. The objective of the event was to provide students with practical insights into Application-Specific Integrated Circuit (ASIC) design and to bridge the gap between academic learning and real-world semiconductor industry practices.

The session was delivered by Mr. Palash Khandale, an industry professional with extensive experience in semiconductor design and ASIC development. The event began with a warm welcome extended to the resource person, faculty members, and participating students. The speaker was formally introduced, highlighting his expertise in ASIC design flow and his contributions to the semiconductor industry.

As a gesture of appreciation, the organizing team presented a sapling to the resource person, symbolizing respect and gratitude. During the session, the resource person, symbolizing respect and gratitude. During the session, the speaker discussed various aspects of ASIC design including the industry workflow, practical design challenges, verification processes, and emerging opportunities in the semiconductor field. He also emphasized the importance of strong fundamentals in digital design and verification for students aspiring to build careers in VLSI and semiconductor industries.

The talk was highly interactive, with students actively engaging in discussions and asking questions related to ASIC design tools, industry expectations, and career opportunities. The session provided valuable exposure to real-world engineering practices and motivated students to explore deeper knowledge in VLSI and semiconductor technologies.

Overall, the event was informative and successful, benefiting students by providing practical insights and guidance from an experienced industry professional.



  Date and Time

  Location

  Hosts

  Registration



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  • Building no 17, Electronics Block
  • DSCE campus, Kumaraswamy layout
  • Bangalore, Karnataka
  • India

  • Contact Event Hosts


  Speakers

Palash Khandale of Ex – Senior Staff Engineer, Samsung | Ex – Qualcomm Engineer





Agenda

3:30 PM – 3:40 PM
Welcome Address and Introduction of the Speaker

3:40 PM – 4:50 PM
Technical Talk by Mr. Palash Khandale
Topic: ASIC Design Beyond Theory: Industry Experience and Practice

4:50 PM – 5:00 PM
Interactive Q&A Session

5:00 PM
Vote of Thanks and Felicitation