Semiconductor Summit 2.0 – Architecting the Future of Chips
Semiconductor Summit 2.0 - Architecting the Future of Chips
March 17–19, 2026
EC Department, A6 Building, CHARUSAT
Where Innovation Meets Implementation.
Semiconductor Summit 2.0 is a three-day flagship technical event organized by the EC Department, CHARUSAT, bringing together academia, industry experts, innovators, and aspiring engineers to explore the evolving semiconductor ecosystem.
The summit is designed to bridge the gap between theoretical learning and real-world semiconductor industry practices. It focuses on VLSI, FPGA, RTL Design, Design Verification, Embedded Systems, and AI-powered chip development.
The event includes:
• Expert-led panel discussions on Fabless Semiconductor Innovation (RTL to ASIC/SoC Implementation)
• Hands-on workshops on Industry-Ready RTL Coding & FPGA Implementation
• Industry Insight Sessions comparing Embedded Systems vs VLSI career paths
• Deep-dive session on AI Powered VLSI – Transforming Engineers
• Silicon Shark Tank – Industry-driven idea pitching competition
• Silent Silicon Gallery – Technical Poster Presentations & Live Demonstrations
• Stall Visit: Wafer to Chip demonstration (Sand to Silicon journey)
• The Silicon Jackpot – Treasure Hunt & FPGA Faceoff
• Interactive Technical Engagement Activities & Tech Games
Winning teams will receive internship opportunities and exciting technical rewards. The summit emphasizes innovation, skill-building, problem-solving, and industry readiness.
This event aims to empower students to become next-generation semiconductor professionals and contribute to India’s growing chip design ecosystem.
Date and Time
Location
Hosts
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- Charotar University of Science and Technology (CHARUSAT)
- CSPIT Campus, Off Nadiad-Petlad Highway, Changa
- Anand, Gujarat
- India 388421
- Building: A6, Department of Electronics and Communication
- Room Number: -
- Click here for Map
- Contact Event Host
- Co-sponsored by Charotar University of Science and Technology (CHARUSAT)
Agenda
📅 DAY 1 – Tuesday, 17/03/2026
09:30 AM – 10:30 AM
Welcome of Guests & Refreshments – Reception and Networking
10:30 AM – 10:40 AM
Inauguration Ceremony – Formal Opening of the Summit
10:50 AM – 11:30 AM
Inaugural Talk – Speaker: Sudhir Naik
11:30 AM – 12:30 PM
Panel Discussion – “Fabless Startups and Fabless MSMEs: Accelerating Semiconductor Growth”
Experts: CEOs & Directors from Leading Semiconductor Companies
12:30 PM – 01:30 PM
Lunch Break & Networking
01:30 PM – 04:30 PM
Hands-on Workshop 1 – Good Coding Practices in Verilog: Writing Industry-Ready Self-Checking Testbenches
(For Pre-Final & Final Year Students)
Hands-on Workshop 2 – Getting Started with Verilog & FPGA
(For First Year / Fourth Semester Students)
📅 DAY 2 – Wednesday, 18/03/2026
09:00 AM – 09:30 AM
Refreshments
09:45 AM – 11:00 AM
Technical Session 1 – “Embedded vs VLSI – What Should I Choose?”
Expert: Nikul Shah, CEO – IndiSemic
11:00 AM – 12:10 PM
Lunch Break & Networking
12:30 PM – 04:30 PM
Silicon Shark Tank – Industry-Driven Idea Pitching Competition
(Industry Sharks – To Be Announced)
Silent Silicon Ideas Gallery – Technical Poster & Project Demonstrations
Stall Visit – Wafer-to-Chip Demonstration by Monk9
📅 DAY 3 – Thursday, 19/03/2026
09:00 AM – 09:30 AM
Refreshments
09:45 AM – 11:00 AM
Technical Session 2 – “AI Powered VLSI – Shaping the NextGen Design Verification Engineers”
Expert: Kaushal Modi, Associate Director – eInfochips
11:00 AM – 12:00 PM
Lunch Break & Networking
12:10 PM – 03:30 PM
The Silicon Jackpot – Technical Treasure Hunt
Organized by VLSI Club
Interactive Technical Engagement Activities – Problem-Solving Challenges & Tech Games
Organized by VLSI Club
03:30 PM – 04:30 PM
Awards & Closing Ceremony – Prize Distribution & Valedictory
Core Head : Dhruv Rupapara Email ID: semisummit.ec@charusat.ac.in
Registration & Payment: All registrations and payments must be completed exclusively through the official event website. No offline or on-spot payments will be accepted.