Two-Dimensional Semiconductors for Low-Power Logic and Memory Devices

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Two-Dimensional Semiconductors for Low-Power  Logic and Memory Devices


Silicon has been the dominant material for electronic computing for decades and very likely will stay dominant for the foreseeable future. However, it is well-known that Moore’s law and Dennard’s scaling that propelled Silicon into this dominant position are long dead. Therefore, a fervent search for (i) new semiconductors that could directly replace silicon or (ii) new architectures with novel materials/devices added onto silicon or (iii) new physics/state-variables or a combination of above has been the subject of much of the electronic materials and devices research of the past 2 decades. In short, there is a pressing need for complementing and supplementing Silicon to operate with greater energy efficiency, speed and handle greater amounts of data. This is further necessary since a completely novel and paradigm changing computing platform (e.g. all optical computing or quantum computing) remains out of reach for now.

    The above is, however, not possible without fundamental innovation in new electronic materials and devices. Therefore, in this talk, I will try to make the case of how novel layered two-dimensional (2D) chalcogenide materials1 and three-dimensional (3D) nitride materials might present interesting avenues to overcome some of the limitations being faced by Silicon (as well as Silicon Carbide) hardware.

    I will end the talk with a broad perspective on the role of novel materials that could turbo-charge silicon, silicon carbide and other pervasive semiconductor technologies for electronic computing.

References:
(1) Song, S.; Rahaman, M.; Jariwala, D. ACS Nano 2024, 18, 10955–10978.

Picture Credit:
https://www.sciencedirect.com/science/article/pii/S2590238523003685, Wafer-scale growth of two-dimensional, phase-pure InSe



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  • Co-sponsored by Gordon Burkhead, Sreekanth Narayan
  • Starts 11 April 2026 03:15 PM UTC
  • Ends 10 June 2026 04:00 AM UTC
  • No Admission Charge


  Speakers

Deep Jariwala of University of Pennsylvania

Topic:

Two-Dimensional Semiconductors for Low-Power Logic and Memory Devices

Silicon has been the dominant material for electronic computing for decades and very likely will stay dominant for the foreseeable future. However, it is well-known that Moore’s law and Dennard’s scaling that propelled Silicon into this dominant position are long dead. Therefore, a fervent search for (i) new semiconductors that could directly replace silicon or (ii) new architectures with novel materials/devices added onto silicon or (iii) new physics/state-variables or a combination of above has been the subject of much of the electronic materials and devices research of the past 2 decades. In short, there is a pressing need for complementing and supplementing Silicon to operate with greater energy efficiency, speed and handle greater amounts of data. This is further necessary since a completely novel and paradigm changing computing platform (e.g. all optical computing or quantum computing) remains out of reach for now.

    The above is, however, not possible without fundamental innovation in new electronic materials and devices. Therefore, in this talk, I will try to make the case of how novel layered two-dimensional (2D) chalcogenide materials1 and three-dimensional (3D) nitride materials might present interesting avenues to overcome some of the limitations being faced by Silicon (as well as Silicon Carbide) hardware. I will start by briefly introducing our past work on integration of 2D chalcogenide semiconductors with silicon2 to realize low-power tunnelling field effect transistors. In particular, I will focus on In-Se based 2D semiconductors2 for this application and extend discussion on them to phase-pure, epitaxial thin-film growth over wafer scales,3 at temperatures low-enough to be compatible with back end of line (BEOL) processing in Silicon fabs. 

    I will then switch gears to discuss memory devices from 2D materials when integrated with emerging wurtzite structure ferroelectric nitride materials4 namely aluminium scandium nitride (AlScN). First, I will present on Ferroelectric Field Effect Transistors (FE-FETs) made from 2D materials when integrated with AlScN and make the case for 2D semiconductors in this application.5-9

   Next, I will introduce our work on Ferroelectric Diode (FeD) devices also based on thin AlScN.10-11 In addition, I will also present how FeDs provide a unique advantage in compute-in-memory (CIM) architectures for efficient storage, search as well as hardware implementation of neural networks.12 Finally, IF time permits, I will present ongoing work and opportunities to extend the application of AlScN memory devices into extreme environments.13-16

    I will end the talk with a broad perspective on the role of novel materials that could turbo-charge silicon, silicon carbide and other pervasive semiconductor technologies for electronic computing.

References:

(1) Song, S.; Rahaman, M.; Jariwala, D. ACS Nano 2024, 18, 10955–10978. 
(2) Miao, J.; ….et al. Jariwala, D. Nature Electronics 2022, 5 (11), 744-751. 
(3) Song, S.;… et al. Jariwala, D. Matter 2023, 6, 3483-3498.
(4) Kim, K.-H.;…. et al. Jariwala, D. Nature Nanotechnology 2023, 18 (5), 422-441.
(5) Liu, X.;… et al. Jariwala, D. Nano Letters 2021, 21 (9), 3753-3761.
(6) Kim, K.-H.;.. et al. Jariwala, D. Nature Nanotechnology 2023, 18, 1044–1050. 
(7) Kim, K.-H.; .. et al. Jariwala, D. ACS Nano 2024, 18 (5), 4180-4188. 
(8) Song, S.;… et al. Jariwala, D. ACS Nano 2025.
(9) Song, S.;…et al. Jariwala, D. Applied Physics Letters 2023, 123 (18).
(10) Liu, X.; et al. Jariwala, D. Applied Physics Letters 2021, 118 (20), 202901.
(11) Kim, K.-H.;et al. Jariwala, D. ACS Nano 2024, 18 (24), 15925-15934. 
(12) Liu, X.; et al. Jariwala, D.  Nano Letters 2022, 22 (18), 7690–7698. 
(13) Pradhan, D. K.; et al. Jariwala, D.  Nature Electronics 2024, 7 (5), 348-355. 
(14) He, Y.; et al. Jariwala, D. Applied Physics Letters 2023, 123 (12). 
(15) He, Y.; et al. Jariwala, D. Nano Letters 2025.
(16) Pradhan, D. K.; et al. Jariwala, D. Nature Reviews Materials 2024, 9 (11), 790-807.

Biography:

Deep Jariwala is an Associate Professor and the Peter & Susanne Armstrong Distinguished Scholar in Departments of Electrical and Systems Engineering and Materials Science and Engineering at the University of Pennsylvania (Penn). His research interests broadly lie at the intersection of new materials, surface science and solid-state devices for computing, sensing, opto-electronics and energy harvesting applications. Deep completed his undergraduate degree in Metallurgical Engineering from the Indian Institute of Technology, Banaras Hindu University in 2010. Deep went on to pursue his Ph.D. in Materials Science and Engineering at Northwestern University graduating in 2015. At Northwestern, Deep made contributions to the study of charge transport and electronic applications of two-dimensional (2D) semiconductors and their devices for which he was awarded the Johannes and Julia Weertman Doctoral Fellowship and the Hilliard Award of the department. Deep then moved to Caltech as a Resnick Prize Postdoctoral Fellow from 2015-2017 working on nanophotonic devices and ultrathin solar cells, before joining Penn in 2018 to launch his independent career. Deep’s research has earned him awards of multiple professional societies including the Adolph Lomb Medal of Optica (formerly OSA), the Peter Mark Memorial Award and Paul H. Holloway Award of the American Vacuum Society, The Richard L. Greene Dissertation Award of the American Physical Society, the Army Research Office and Office of Naval Research Young Investigator Awards, TMS Frontiers in Materials Award, Intel Rising Star Award, IEEE Photonics Society Young Investigator Award, IEEE Nanotechnology Council Early Career Award, IEEE Benjamin Franklin Key Award, IUPAP Early Career Scientist Prize in Semiconductors, the SPIE early career achievement award, the Kavli Early Career Lectureship of MRS, the Alfred P. Sloan Fellowship in addition to being named in Forbes Magazine list of 30 scientists under 30 and is an invitee to Frontiers of Engineering conference of the National Academy of Engineering (2019, 2025). In 2022, his work on ferroelectric diode memory was also awarded with the prestigious Bell Labs Prize worth 100000 $. In addition, he has also received the S. Reid Warren Jr. award and Undergraduate Research Mentoring award given to one faculty member every year at Penn Engineering for inspiring and motivating undergraduate students through teaching and research. He currently serves as an Associate Editor (AE) for ACS Nano Letters and has served as an AE for IEEE Photonics Technology Letters as well as npj 2D materials and applications in the past. He has published over 180 journal papers with more than 26000 citations and holds several patents. He serves as the Associate Editor for Nano Letters (ACS) and has been appointed as a Distinguished Lecturer for the IEEE Nanotechnology Council for 2025 as well as Fellow of Optica (2026). At Penn he leads a research group comprising more than ten graduate and postdoctoral researchers supported by a variety of government agencies (NSF, DARPA, ARO, AFOSR, ONR), industries and private foundations. He is the co-founder of Agni Semiconductor, a start-up company based on his research of ferroelectric diode memory aiming to commercialize the technology.

Google Scholar: https://scholar.google.com/citations?user=u1CHA2sAAAAJ&hl=en

Lab website: https://jariwala.seas.upenn.edu/

https://www.seas.upenn.edu/stories/deep-jariwala-on-the-future-of-two-dimensional-materials/

https://www.sciencedirect.com/science/article/abs/pii/S1359028624000445 

Email:

Address:Department of Electrical and Systems Engineering, University of Pennsylvania, Philadelphia, Pennsylvania, United States, 19104





Agenda

6:00 PM - Start of online/virtual event. Local chapter and Section updates, introductions, etc.
6:05 PM - Start of Distinguished Lecture
6:55 PM - Formal End of Lecture, Start of Q&A - Discussions
7:15 PM - Formal end of event, Vote of thanks to the Speaker....



An IEEE Southeastern Michigan Section event. All are welcome. Consider becoming an IEEE member if such similar events are of professional/academic interest to you/ All follow ups to Sharan Kalwani



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