Key Considerations for Successful High-Speed Board Design

#signal-integrity #circuits #electronics #pcb #board
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IEEE SSCS SCV Chapter


Key Considerations for Successful High-Speed Board Design
Ujjwal Datt Sharma

Abstract: Successful high-speed board design requires more than meeting electrical and functional requirements. Engineers must make balanced decisions that affect performance, reliability, manufacturability, cost, and schedule across the full product lifecycle. This talk provides a practical overview of the key considerations that should guide high-speed board design from concept through implementation. It emphasizes the value of thoughtful early decisions in reducing downstream problems during validation and bring-up. Attendees will gain a broader understanding of how disciplined design practices can improve hardware quality and support smoother product development.  

 

Speaker biography: Ujjwal Datt Sharma is a Hardware Engineer with 10 years of experience in high-speed system design, signal integrity, and AI hardware architecture. He specializes in motherboard design, FPGA-based systems, and data center switch platforms. He holds a Bachelor of Science in Electrical and Electronics Engineering from Manipal Institute of Technology, Karnataka (KA), India, and a Master of Science in Electrical and Computer Engineering from the University of New Haven, Connecticut (CT). His work focuses on developing reliable, high-performance hardware systems for next-generation computing and networking applications.



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  • 500 El Camino Real
  • Santa Clara, California
  • United States 95053
  • Building: SCDI (Sobrato Campus for Discovery and Innovation)
  • Room Number: SCDI 1308

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  • Starts 23 April 2026 03:39 AM UTC
  • Ends 30 April 2026 07:00 AM UTC
  • No Admission Charge






Agenda

Networking: 5:30pm-6pm 

Talk: 6p-7pm