ENEE 408D/719M Mixed-Signal VLSI Capstone Poster Session
ENEE 408D/719M Mixed-Signal VLSI Capstone Poster Session
Event Details:
Date: May 7
Time: 8:00 AM – 10:00 AM
Location: A.V. Williams Building, Room 1146
University of Maryland, College Park
Directions: https://maps.app.goo.gl/pgmdyGqYJyHwvcxX8
The session will feature a variety of projects covering both analog and digital circuit design. Some
of these projects will be fabricated in TSMC’s 180nm CMOS process, providing insight into real
silicon implementations.
This is a great opportunity to interact with students, explore innovative designs, and engage with
the mixed-signal VLSI community.
If you need more information, please reach out to:
Dr. Sahil Shah
sshah389@umd.edu
Date and Time
Location
Hosts
Registration
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- 8223 Paint Branch Dr, College Park
- University of Maryland, College Park
- College Park, Maryland
- United States 20740
- Building: A.V Williams
- Room Number: 1146
- Click here for Map
Agenda
Poster Session
ENEE 408D/719M Mixed-Signal VLSI Capstone Poster Session