Silicon Photonics Qualification and Reliability Requirements
#photonics
#co-packaged
#optics
#chiplets
#HIR
#heterogeneous
#integration
#reliabilty
Co-Sponsored by the Photonics Chapter
As silicon photonics and co-packaged optics (CPO) technologies continue to scale for AI, cloud, and high-bandwidth networking applications, reliability qualification methodologies are becoming increasingly critical. While much of the industry focus has been on performance and integration density, standardized approaches for qualification, reliability assessment and long-term service life prediction remain an important industry challenge.
This webinar will present the motivation, structure, and key technical considerations behind the emerging JEDEC work that Cisco has led on Silicon Photonics Qualification and Reliability Requirements. The session will discuss reliability expectations and qualification strategies for silicon photonics devices, chiplets, integrated optical assemblies, and heterogeneous integration approaches used in AI and datacenter applications. The webinar is intended for engineers and technologists working in silicon photonics, advanced packaging, NPO, CPO, datacenter infrastructure, reliability engineering, semiconductor manufacturing, and optical module development.
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- Starts
19 May 2026 07:00 AM UTC
- Ends
16 July 2026 08:00 PM UTC
- No Admission Charge
Speakers
Farnood Rezaie of Cisco
Biography:
Farnood Rezaie, PhD, MBA, is a Technical Leader at Cisco Systems focused on silicon photonics, optical interconnects, co-packaged optics (CPO) and advanced packaging technologies for AI and datacenter networks. He has more than 15 years of experience spanning silicon photonics product engineering, qualification, manufacturing, heterogeneous integration and high-volume production. Dr. Rezaie is a co-author of emerging JEDEC silicon photonics reliability standards and OIF Energy Efficient Interfaces – Compute Optics Interface (EEI-COI) specifications. He also serves as IEEE HIR Photonics Co-Chair, is a Senior Member of IEEE and Optica, and frequently speaks at industry conferences and events.
Angelo Miele joined Cisco Systems Inc. as part of the Lightwire Silicon Photonics acquisition in March 2012. He started his 25+ year career as a reliability engineer at JDS Uniphase. His primary role was to provide reliability support and qualification of Cisco OEM optical products including PLC and free space optics WXC ROADMS, amplifier line cards, super transport blade line cards for Cisco's 50GHz and 100GHz long haul transport solutions. He has worked as a Cisco partner for the full length of his career. He is presently the Manager of the Silicon Photonics and Transceiver Modules Reliability Group. His team is responsible for the reliability of the leading silicon photonics, optical interconnects, co-packaged optics (CPO) and advanced packaging technologies for AI and datacenter networks. Angelo is currently leading the JEDEC Silicon Photonics Qualification and Reliability Task Group, reporting to the JC14.3 Committee, whose aim is to standardize reliability requirements across the silicon photonics eco-system within the JEDEC framework.
Address:United States
