IEEE CEDA Industry Insights Series | Functional Verification of RTL Digital Designs: Crux & Craft
The IEEE Council on Electronic Design Automation (CEDA) Bangalore Chapter, in collaboration with the IEEE Solid-State Circuits Society (SSCS) Santa Clara Valley Section, is pleased to present another session in the IEEE CEDA Industry Insights Series.
This webinar, "Functional Verification of RTL Digital Designs: Crux & Craft," explores one of the most critical aspects of modern digital IC design—ensuring that RTL designs function correctly before fabrication. The session will cover the fundamentals of RTL functional verification, industry methodologies, verification planning, common challenges, and practical approaches adopted in today's semiconductor industry.
The talk will be delivered by Dr. Anantharaj Thalaimalai Varnaraj, Design Verification Leader – GPU Hardware, Samsung Austin Research and Development Center (SARC) and Advanced Computing Lab (ACL), San Jose, California. Drawing from extensive experience in GPU hardware verification, Dr. Varnaraj will share practical insights into verification strategies, industry workflows, and the evolving role of verification engineers in the semiconductor ecosystem.
Whether you are a student preparing for a career in VLSI, an academic, or an industry professional looking to deepen your understanding of digital design verification, this webinar offers valuable knowledge directly from an experienced verification leader.
Speaker
Dr. Anantharaj Thalaimalai Varnaraj
Design Verification Leader – GPU Hardware
Samsung Austin Research and Development Center (SARC) & Advanced Computing Lab (ACL), San Jose, California
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