Expert Session on VLSI Design and Test
An Expert Session on 'VLSI Design and Test' was organized by the Department of Electronics and Communication Engineering, Dayananda Sagar University, in association with the IEEE DSU Student Branch and IEEE CEDA DSU Student Branch Chapter. The session was delivered by Dr. Ravikumar CP, Chief Learning Officer, Vinyanatech. The expert provided an overview of VLSI design and testing roles, explained the complete VLSI design flow, discussed verification and validation methodologies, and highlighted the technical competencies expected by the semiconductor industry. The session concluded with an interactive question-and-answer session where participants clarified career opportunities, design methodologies, and industry expectations in VLSI. The event significantly enhanced participants' understanding of semiconductor design and encouraged students to pursue careers in the VLSI domain.
Date and Time
Location
Hosts
Registration
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- VLSI Lab 308, Department of ECE
- School of Engineering, Dayananda Sagar University
- Bangalore, Karnataka
- India 560111
Speakers
Ravikumar CP of VINYANA TECH
Agenda
10:00–10:30 AM : Registration
10:30–10:40 AM : Welcome Address
10:40–12:00 PM : Expert Session by Dr. Ravikumar CP
12:00–12:20 PM : Interactive Q&A
12:20–12:30 PM : Vote of Thanks