Agile Hardware Kitchen Tools for Architecture Innovation
As hardware systems continue to scale in complexity—from high-level synthesis to chiplet-based and 3D architectures—architectural innovation is increasingly constrained by slow, rigid, and fragmented design tools. In this talk, I introduce the Agile Hardware Kitchen, a suite of open-source tools developed by the SHARC Lab to enable fast, accurate, and scalable hardware architecture exploration. The talk highlights OmniSim, which provides near-C-speed simulation with RTL-level timing accuracy for complex HLS designs; LaZagna, an end-to-end framework for exploring physically realizable 3D FPGA architectures from architectural specification to RTL and bitstream generation; Omelet, a packaging-aware 2.5D/3D chiplet system interconnect simulator to provide high-fidelity early-stage design space exploration; and open infrastructures that support reproducible and ML-driven HLS research. Together, these efforts aim to lower the barrier to hardware architecture research, accelerate design iteration, and enable a more open and agile future for computing systems.
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