Francesco Carobolante of IoTissimo

At 5 kW and 0.6 V, an AI processor draws more than 8,000 A through its package. No lateral power-delivery network supplies that current without spending a large share of the supply voltage on guardband, and no C4 array carries it without dedicating thousands of bumps to power at the expense of signal escape. The package, not the transistor, now sets the limit, and the resolution is directional: power and heat flow vertically through the substrate while high-bandwidth signal flows horizontally to the perimeter, so the substrate absorbs the role once played by the printed circuit board. A Perf/W model gives droop scaling linearly with local current density while the resulting penalty scales quadratically, since switching energy varies with the square of the supply voltage: package-integrated regulation pays twice, and its advantage grows super-linearly with current density. Embedded regulation collapses the chain from board regulator through PCB and C4 into a vertical path inside the substrate, cutting droop roughly four-fold. In return it demands a build-up substrate reconciling signal density, stiffness, thermal conduction and embeddability, and two enabling numbers: inductor current density rising from 3 toward 6–10 A/mm², and a higher intermediate bus voltage to hold input current down.

Biography:

Francesco Carobolante is Principal & Strategic Technology Advisor at IoTissimo, where he helps global organizations and startups develop technology and business strategies to compete in the fast-changing high-tech world. Previously, as Director of Corporate Strategy & Ventures at Intel Corporation, he played a pivotal role in shaping advanced packaging strategies, particularly for high-power AI processors and energy-efficient infrastructure.

His deep expertise in semiconductors and system integration is further built on a 10-year tenure as Vice President of Engineering at Qualcomm, following senior leadership roles at STMicroelectronics and Fairchild. A renowned innovator and CES “Best of Innovation” Award Honoree, Francesco has created numerous industry “firsts”.

He is an IEEE Senior Life Member (EPS, EDS, MTT-S, SSCS, PELS) and a prominent leader in the packaging community, serving on multiple Committees for the Heterogeneous Integration Roadmap (HIR Chapter 10), the Power Supply on Chip (PwrSoC), PwrPack and EnerHarv workshops. With over 95 US patents, he is a frequent keynote speaker and expert panelist at premier international conferences. He also serves on startup boards and mentors at technology incubators and universities. He holds MSEE degrees from both the University of Padova, Italy, and University of California, Los Angeles.