Yan Li of MediaTek

While heterogeneous integration offers maximum performance, it complicates the path to mass production. As packaging evolves toward 3D and 3.5D configurations, traditional fault isolation (FI) and failure analysis (FA) methods face significant challenges. This presentation provides an overview of industry trends in advanced packaging technology development and offers a technical deep dive into the practical challenges of FI and FA within complex interconnect environments, such as hybrid bonding and micro-bump arrays. Attendees will gain insight into current industry troubleshooting workflows and a forward-looking roadmap of the tools and techniques being developed to address advanced packaging failures.

Biography:

Dr. Yan Li  received her Ph.D. degree in Materials Science and Engineering from Northwestern University, U.S.A. in 2006, and her M.S and B.S degree in Physics from Peking University, China. After more than 17 years in Intel Arizona and 3 years in Samsung Advanced Packaging group in San Jose focusing on advanced packaging technology developments, she joined Media Tek USA as a Principal Engineer of Packaging Technology in 2026. Dr. Li has been an active member of Minerals Metals and Materials Society (TMS), Institute of Electrical and Electronics Engineers (IEEE), American Society for Metals (ASM), and Electronic Device Failure Analysis Society (EDFAS). She has been appointed as International Symposium for Testing and Failure Analysis (ISTFA) annual conference organizer since 2011, EDFAS board member since 2019, EDFAS vice president since 2024, International Roadmap on Failure Analysis (IRFA) Packing council co-chair since 2023, IEEE Electronic Components and Technology Conference (ECTC) Applied Reliability sub-committee member since 2024, and ISTFA general Chair in 2024. Dr. Li has published numerous papers and patents in the microelectronic packaging area. She is an associate editor of “Microelectronics Reliability” and the co-editor of three semiconductor industry highly recognized books on 3D Microelectronic Packaging and Autonomous Vehicles.

Address:United States

David Hu of Indium Corp.

The rapid growth of HPC and AI is driving unprecedented power density and packaging complexity, creating simultaneous challenges in thermal management and assembly. Metallic thermal interface materials (TIM) offer high thermal conductivity and low interfacial resistance of efficient heat dissipation, while low temperature solders reduce assembly warpage and thermomechanical stress in advanced packages. This presentation reviews recent developments in metallic TIMs and low temperature solder paste technologies, and their potential roles in enabling reliable, scalable next-generation hardware.

Biography:

David Hu is an Application Manager, responsible for delivering applications support and driving sales initiatives for Indium Corporation’s customers in the semiconductor markets. He closely collaborates with Sales, R&D, Product Management, Operations, and Quality departments across the company. David has worked for Indium Corporation for 17 years, and during his tenure with the company, he has held the roles of Sales Engineer, Technical Manager, Market Development Manager. Currently based in California, David holds a Bachelor of Science degree from Fudan University in Shanghai. He has a Six Sigma Black Belt and is an SMTA Certified Engineer.

Address:United States

Audrey Chamoire of Covalent

Biography:

Director of Failure Analysis

Austin Barnes of Covalent

Biography:

Director of Materials, Chemistry, and Surfaces