From Chip to System: A Holistic Approach to 2D Scalable Low-Loss D-Band Active Phased Array Realization

#D-band #(110–170 #GHz) #systems #Active #phased #array #heterogeneous #integration

The relentless demand for multi-gigabit wireless communication and high-resolution sensing drives rapid innovation in D-band (110–170 GHz) systems. However, realizing efficient and scalable active phased arrays at these frequencies remains challenging due to high cost, interconnect losses, packaging parasitics, and heterogeneous integration constraints. This talk presents a holistic, system-level approach to low-loss D-band phased array integration that unifies circuit, antenna, and packaging co-design. Leveraging both silicon-based (CMOS, SiGe) and III–V integrated circuits, the approach emphasizes optimized beamformer and power amplifier architectures combined with low-cost 2D scalable, wide-angle scanning wideband antenna arrays implemented using low-cost PCB processes. Through electromagnetic co-optimization and advanced interconnect engineering, the framework achieves significant reduction in loss and improvement in overall system efficiency. Measured D-band results from prototype modules demonstrate wide-angle beam steering and data transmission rates up to 100 Gb/s. These results confirm the feasibility of steerable, high-capacity arrays suitable for both communication and sensing platforms.