workshop On Chip Design and Fabrication
#application-specific-integrated-circuits
#cmos
#integrated-circuits
#logic-gates
#ic-design
#microelectronics
#CAS
#edspanama
#IEEE
#ieeepanama
#Panama
#OpenSiliconInitiative
Workshop on Chip Design and Fabrication
The workshop On Chip Design and Fabrication is a 2-day intensive program that provides the opportunity to design integrated circuits from an idea to manufacture a real chip. This is a hands-on, beginner-friendly course, guiding participants through the world of silicon design.
The event will be hosted during the Latin America and Caribbean Semiconductor Summit from 1-2 October 2026 in Panama City, Panama. The Summer Lab will be sponsored by the IEEE Division I Open Silicon initiative under the IEEE Electron Devices Society EDS, Circuit and Systems Society CAS, and Solid-States Circuits Society.
The event offers up to 40 scholarships aimed to IEEE professionals or students from Latin America with an advanced level of microelectronics. The course will be taught entirely in English by an experienced member of the Tiny Tapeout engineering team, ensuring expert guidance throughout.
The goal is to give students hands-on experience with building their own application-specific integrated circuits ASIC and taking them all the way through to production - with the goal of holding a fully-packaged and ready-to-use chip in their hand at the end of the process. Each student that successfully submits a design that meets all guidelines will receive their chip fabricated.
Short-listed candidates will be asked to pay a $60.00 USD fee to cover incidentals during the course.
Payment is required to reserve and guarantee your spot after you have been preselected.
Participants are encouraged to bring their own laptop computer and satisfy with the following technical skills:
- Advanced English level (fluency required)
- Microelectronics and advanced principles in Semiconductors
- Knowledge about Transistors (bipolar and FET)
- CMOS
- Linux
- Scripting language
- Hardware description languages
Scholarship includes:
- Complete course in IC design
- A real chip fabrication sponsored by the Open Silicon Initiative and manufactured by Tiny Tapeout
- Lodging for 3 nights (double-occupancy rooms)
- Meals during the summer school (including breakfast and lunch)
- Opportunity to attend the LACSS conference and mingle among experts in semiconductors
- Opportunity to attend the EDS/CASS MQ on Saturday October 3rd.
- Certification of completion
Not included:
- Travel (each applicant is responsible for travel arrangements)
- Visa application fees
- Transportation from and to the airport
- Dinner or additional meals after the sessions
- Incidentals or medical emergency (participants are encouraged to have a medical insurance)
Date and Time
Location
Hosts
Registration
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- City of Knowledge
- Clayton, Estanislao Orobio Street
- Panamá, Panama
- Panama
- Building: Convention Center (184)
- Contact Event Hosts
- Co-sponsored by National Secretariat for Science, Technology, and Innovation (SENACYT) ; Center for Advanced Semiconductor Technologies (C-TASC AIP); IEEE Division, Open Silicon initiative, IEEE EDS, IEEE CAS, InchFab
- Starts 13 September 2026 05:00 AM UTC
- Ends 01 October 2026 05:00 AM UTC
- Admission fee ?
Agenda
Day 1: Thursday, October 1
- 8:30 – 9:30 AM: Event Opening Session (Introduction)
- 9:30 – 10:30 AM: Draw a transistor that could be used in a logic gate
- 10:30 AM – 12:00 PM: Practice
- 12:00 – 1:00 PM: Lunch
- 1:00 – 2:00 PM: Build a simple digital design using logic gates
- 2:00 – 3:00 PM: Practice
- 3:00 – 3:15 PM: Break
- 3:15 – 4:15 PM: Generate the ASIC files from your design
- 4:15 – 5:15 PM: Practice
Day 2: Friday, October 2
- 9:00 – 10:00 AM: Submit your design to be manufactured on the next Tiny Tapeout chip
- 10:00 AM – 12:00 PM: Practice
- 12:00 – 1:00 PM: Lunch
- 1:00 – 4:00 PM: Work on designs & Q&A session with instructor