Basics of Jitter in Wireline Communications

#Jitter #wireline
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Jitter refers to deviation from ideal timing in clock and data transitions. In wireline communications, jitter reduces the timing margin available for clock and data recovery (CDR) circuits and poses significant challenges to signal integrity as the data rates march towards 100Gb/s/lane and beyond. In this talk, we first review the basic definitions of jitter and its properties, the relationship between jitter and phase noise, and the effects of jitter on CDR and other building blocks of a wireline system. We then describe the concept of jitter transfer, jitter generation, and jitter tolerance curves, and the methods of characterizing, modeling, and simulating jitter. Finally, we present some recent works on jitter measurement and jitter mitigation techniques that are used to optimize the link performance.


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  • Start time: 23 Aug 2019 10:00 AM
  • End time: 24 Aug 2019 12:00 PM
  • All times are (UTC-07:00) Pacific Time (US & Canada)
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  • Qualcomm AZ-Auditorium (10155 Pacific Heights Blvd, San Diego, CA 92121)
  • San diego, California
  • United States
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  • Starts 08 August 2019 09:00 PM
  • Ends 23 August 2019 09:52 AM
  • All times are (UTC-07:00) Pacific Time (US & Canada)
  • No Admission Charge