#amplifiers #microwave #mtt-s #frequency #gain #impedance #convergence #design-methodology

Doherty PAs remain the workhorse for high-efficiency transmitters operating under high PAPR signals, yet achieving robust back-off efficiency, bandwidth, and linearizability requires a disciplined design flow. This talk presents a practical, measurement-anchored methodology for high-power Doherty PA design using modern GaN processes. We start by revisiting classical and advanced Doherty architectures—asymmetric, multi-way, wideband/post-matched, and transformer-based combiners—highlighting how impedance inverters, peaking device sizing, and bias shaping govern dynamic load modulation. The core of the talk focuses on extracting actionable targets from fundamental-to-harmonic load-pull: interpreting 2D/3D contours (Pout, PAE, gain, IM3/ACPR), tracing Zopt trajectories with power and frequency, and reconciling CW and modulated load-pull to set realistic back-off efficiency goals (6–10 dB). We translate these insights into a step-by-step synthesis: allocating main/peaking periphery, selecting inverter impedance and phase, co-optimizing harmonic terminations, and designing post-matching for bandwidth without sacrificing Doherty action.  Attendees will leave with a checklist and design templates that link device-level load-pull data to circuit-level choices, expediting convergence to Doherty PAs that deliver high efficiency, linearizability, and manufacturable performance.