IEEE EDS/PHO Columbus DL Speaker: FET100 - 100 years of Field Effect Transistors: From MOSFET to CFET Devices (Prof. Dr. João Antonio Martino, University of São Paulo, Brazil)
Abstract:
The Field Effect Transistor (FET) has been the cornerstone device of the integrated circuits era. This presentation begins with an overview of the key milestones in FET evolution and concludes with a discussion of possible device architectures for future technologies.
The origin dates back to Lilienfeld’s patent, filed in 1925, which was never fabricated due to technological limitations of that time. The first experimental Metal–Oxide–Semiconductor FET (MOSFET) was successfully demonstrated only in 1960. The early MOSFET consisted of Aluminum (as the gate metal), silicon dioxide (as the gate oxide), and silicon (as the semiconductor channel).
To sustain Moore’s Law and mitigate short-channel effects, continuous innovations in both materials and device structures were required to improve electrostatic control between the gate and the channel. The gate electrode evolved from heavily doped polysilicon to metals such as TiN and TaN. The gate dielectric shifted from conventional SiO₂ to high-κ materials such as SiON, HfSiON, and HfO₂, significantly reducing gate leakage currents. Likewise, the silicon channel was engineered through strain techniques (uniaxial and biaxial strained Si) and the incorporation of alternative materials such as SiGe, Ge, and InGaAs to enhance carrier mobility.
Structural innovations have also been fundamental. The MOSFET advanced from bulk devices to Silicon-on-Insulator (SOI) architectures, and later from single-gate designs to multi-gate devices such as FinFETs, nanowires, nanosheets, and forksheets, enabling superior electrostatic coupling. Beyond conventional MOSFETs, novel devices exploiting different conduction mechanisms have been explored. For instance, Tunnel FETs (TFETs) leverage band-to-band tunneling instead of drift-diffusion, offering advantages in subthreshold operation and energy efficiency.
Finally, this presentation will also address the analog behavior of these emerging devices, highlighting their potential impact on future electronic systems.
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- Department of Electrical and Computer Engineering
- 2015 Neil Avenue
- Columbus, Ohio
- United States 43210
- Building: Dreese Lab
- Room Number: 260
- Starts 06 November 2025 03:55 PM UTC
- Ends 13 November 2025 01:00 PM UTC
- No Admission Charge
Speakers
João
Prof. Dr. João Antonio Martino, University of São Paulo , Brazil
Biography:
João Antonio Martino (SM’07) began his career in microelectronics in 1982 during his graduate studies at the University of São Paulo (USP), Brazil, where he received his Master (in NMOS technology) in 1984 and Ph.D. (in CMOS technology) in 1988, both in Electrical Engineering (Microelectronics). From 1989 to 1994, he was a post-doctoral researcher in a joint collaboration between Imec (Interuniversity Microelectronics Center)/KU Leuven, Belgium, and USP, focusing on SOI devices and technology. In 1992, he joined the Department of Electronic Systems at University of São Paulo (USP), where he has been a Full Professor since 2005. He has led the CMOS-SOI Research Group since 1990 and the Laboratory of Integrated Systems (LSI) since 2017. He also served as Head of the Department of Electronic Systems (2009–2013) and as Coordinator of the graduate Program in Electrical Engineering (2019–2023). Prof. Martino has authored or co-authored more than 700 journal and conference papers and is author/editor of 7 books. He has supervised or co-supervised 78 graduate students (52 M.Sc. and 26 Ph.D.). He pioneered the study of SOI device characterization and technology in Brazil in 1990. He led the fabrication of the first 3D transistor in South America (an electron-beam triple-gate FinFET) in 2012 and holds the patent for the first reconfigurable SOI MOSFET fabricated in South America (2015). His current research interests include the electrical characterization and fabrication of SOI and multiple-gate devices (FinFET, nanowire, nanosheet, forksheet), Tunnel-FETs, Reconfigurable FETs, and Bio-FETs, as well as their application in basic analog circuits. He is a Senior Member of IEEE and a member of the Electrochemical Society. He served as Vice-Chair of the IEEE Electron Devices Society (EDS) Region 9 Subcommittee for Regions/Chapters (2013–2018), has been Chair of the South Brazil EDS Chapter (2007–2024), and has been an IEEE EDS Distinguished Lecturer since 2008. He currently holds a federal research grant awarded by CNPq at the highest level in microelectronics in Brazil (PQ-1A). In 2016, he received the Padre Roberto Landell de Moura Award from the Brazilian Society of Microelectronics (SBMicro).
Address:University of São Paulo, , Brazil